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DS1315 Datasheet

  • DS1315

  • Phantom Time Chip

  • Dallas   Dallas

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DS1315
TIMING BLOCK DIAGRAM
Figure 1
Communication with the Time Chip is established by pattern recognition of a serial bit stream of 64 bits
which must be matched by executing 64 consecutive write cycles containing the proper data on data in
(D). All accesses which occur prior to recognition of the 64-bit pattern are directed to memory via the
chip enable output pin (
CEO
).
After recognition is established, the next 64 read or write cycles either extract or update data in the Time
Chip and
CEO
remains high during this time, disabling the connected memory.
Data transfer to and from the timekeeping function is accomplished with a serial bit stream under control
of chip enable input (
CEI
), output enable (
OE
), and write enable (
WE
). Initially, a read cycle using the
CEI
and
OE
control of the Time Chip starts the pattern recognition sequence by moving pointer to the
first bit of the 64-bit comparison register. Next, 64 consecutive write cycles are executed using the
CEI
and
WE
control of the Time Chip. These 64 write cycles are used only to gain access to the Time Chip.
When the first write cycle is executed, it is compared to bit 1 of the 64-bit comparison register. If a match
is found, the pointer increments to the next location of the comparison register and awaits the next write
cycle. If a match is not found, the pointer does not advance and all subsequent write cycles are ignored. If
a read cycle occurs at any time during pattern recognition, the present sequence is aborted and the
comparison register pointer is reset. Pattern recognition continues for a total of 64 write cycles as
described above until all the bits in the comparison register have been matched. (This bit pattern is shown
in Figure 2). With a correct match for 64 bits, the Time Chip is enabled and data transfer to or from the
timekeeping registers may proceed. The next 64 cycles will cause the Time Chip to either receive data on
D, or transmit data on Q, depending on the level of
OE
pin or the
WE
pin. Cycles to other locations
3 of 21

DS1315 PDF文件相關(guān)型號

DS1315EN-33,DS1315EN-5

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