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DS1314 Datasheet

  • DS1314

  • 3V Nonvolatile Controller with Lithium Battery Monitor

  • 201.25KB

  • Dallas   Dallas

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DS1314
NOTES:
1. All voltages referenced to ground.
2. Measured with outputs open circuited.
3. I
CCO1
is the maximum average load which the DS1314 can supply to attached memories at V
CCO
鈮?/div>
V
CCI
-0.2V.
4. I
CCO1
is the maximum average load which the DS1314 can supply to attached memories at V
CCO
鈮?/div>
V
CCI
-0.3V.
5. All inputs within 0.3V of ground or V
CCI
.
6. I
CCO2
is the maximum average load current which the DS1314 can supply to the memories in the
battery-backup mode.
7. Measured with a load as shown in Figure 2.
8. Chip Enable Output
CEO
can only sustain leakage current in the battery-backup mode.
9.
CEO
will be held high for a time equal to t
REC
after V
CCI
crosses V
CCTP
on power-up.
10.
BW
and
RST
are open drain outputs and as such cannot source current. External pull-up resistors
should be connected to these pins for proper operation. Both
BW
and
RST
can sink 10 mA.
11. t
CE
maximum must be met to ensure data integrity on power-down.
12. In battery-backup mode, inputs must never be below ground or above V
CCO
.
DC TEST CONDITIONS
Outputs Open
All voltages are referenced to ground
AC TEST CONDITIONS
Output Load: See below
Input Pulse Levels: 0 - 3.0V
Timing Measurement Reference Levels
Input: 1.5V
Output: 1.5V
Input pulse Rise and Fall Times: 5 ns
OUTPUT LOAD
Figure 2
* INCLUDING SCOPE AND JIG CAPACITANCE
10 of 11

DS1314 產(chǎn)品屬性

  • Lead (SnPb) Finish for COTSObsolescence Mitigation Program

  • 50

  • 集成電路 (IC)

  • 存儲器 - 控制器

  • -

  • 非易失性 RAM

  • 3 V ~ 3.6 V

  • -40°C ~ 85°C

  • 8-DIP（0.300"，7.62mm）

  • 8-PDIP

  • 管件

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