bq4847/bq4847Y
RTC Module With CPU Supervisor
Features
廬
Real-Time Clock counts seconds
through years in BCD format
廬
Integrated battery and crystal
廬
On-chip battery-backup switch-
over circuit with nonvolatile con-
trol for an external SRAM
廬
130mAh battery capacity
廬
鹵
1 minute per month clock accu-
racy
廬
Less than 500nA of clock opera-
tion current in backup mode
廬
Microprocessor reset valid to
V
CC
= V
SS
廬
Independent watchdog timer
with a programmable time-out
period
廬
Power-fail interrupt warning
廬
Programmable clock alarm inter-
rupt active in battery-backup
mode
廬
Programmable periodic interrupt
廬
Battery-low warning
General Description
The bq4847 Real-Time Clock Mod-
ule is a low-power microprocessor
peripheral that integrates a time-
of-day clock, a 100-year calendar, a
CPU supervisor, a battery, and a crys-
tal in a 28-pin DIP module. The part
is ideal for fax machines, copiers, in-
dustrial control systems, point-of-sale
terminals, data loggers, and comput-
ers.
The bq4847 contains an internal
battery and crystal. Through the use
of the conditional chip enable output
(CE
OUT
) and battery voltage output
(V
OUT
) pins, the bq4847 can write-
protect and make nonvolatile an
external SRAM. The backup cell
powers the real-time clock and
maintains SRAM information in
the absence of system voltage.
The
bq4847
contains
a
temperature-compensated refer-
ence and comparator circuit that
monitors the status of its voltage
supply. When an out-of-tolerance
condition is detected, the bq4847
generates an interrupt warning
and subsequently a microproces-
sor reset. The reset stays active
for 200ms after V
CC
rises within
tolerance to allow for power supply
and processor stabilization.
The bq4847 also has a built-in
watchdog timer to monitor processor
operation. If the microprocessor does
not toggle the watchdog input (WDI)
within the programmed time-out,
the bq4847 asserts WDO and RST.
WDI unconnected disables the
watchdog timer.
The bq4847 can generate other in-
terrupts based on a clock alarm con-
dition or a periodic setting. The
alarm interrupt can be set to occur
from once per second to once per
month. The alarm can be made ac-
tive in the battery-backup mode to
serve as a system wake-up call. For
interrupts at a rate beyond once per
second, the periodic interrupt can be
programmed with periods of 30.5碌s
to 500ms.
Caution:
Take care to avoid inadvertent dis-
charge through V
OUT
and CE
OUT
after battery isolation has been
broken.
Pin Connections
VOUT
NC
NC
WDO
INT
RST
A3
A2
A1
A0
DQ0
DQ1
DQ2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
CEIN
CEOUT
NC
WDI
OE
CS
NC
DQ7
DQ6
DQ5
DQ4
DQ3
Pin Names
A
0
鈥揂
3
Clock/Control address
inputs
Data inputs/outputs
Write enable
Output enable
Chip select input
External RAM chip
enable
Conditional RAM chip
enable
NC
V
OUT
INT
RST
WDI
WDO
V
CC
V
SS
No connect
Back-up battery output
Interrupt output
Microprocessor reset
Watchdog input
Watchdog output
+5V supply
Ground
DQ
0
鈥揇Q
7
WE
OE
CS
CE
IN
28-Pin DIP Module
PN484701.eps
CE
OUT
Sept. 1996
1
1
2
3
4
5
6
