音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

ZL30101QDC Datasheet

  • ZL30101QDC

  • T1/E1 Stratum 3 System Synchronizer

  • 34頁(yè)

  • ZARLINK   ZARLINK

掃碼查看芯片數(shù)據(jù)手冊(cè)

上傳產(chǎn)品規(guī)格書

PDF預(yù)覽

ZL30101
T1/E1 Stratum 3 System Synchronizer
Data Sheet
Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Supports Telcordia GR-1244-CORE Stratum 3
Supports G.823 and G.824 for 2048 kbit/s and
1544 kbit/s interfaces
Supports ANSI T1.403 and ETSI ETS 300 011 for
ISDN primary rate interfaces
Simple hardware control interface
Accepts two input references and synchronizes to
any combination of 8 kHz, 1.544 MHz, 2.048 MHz,
8.192 MHz or 16.384 MHz inputs
Provides a range of clock outputs: 1.544 MHz,
2.048 MHz, 16.384 MHz and either 4.096 MHz &
8.192 MHz or 32.768 MHz & 65.536 MHz
Provides 5 styles of 8 kHz framing pulses
Holdover frequency accuracy of 1 x 10
-8
Lock, Holdover and Out of Range indication
Selectable loop filter bandwidth of 1.8 Hz or 922 Hz
Less than 0.6 ns
pp
jitter on all output clocks
External master clock source: clock oscillator or
crystal
Ordering Information
ZL30101QDC
64 pin TQFP
October 2004
-40擄C to +85擄C
Applications
鈥?/div>
Synchronization and timing control for multi-trunk
DS1/E1 systems such as DSLAMs, gateways and
PBXs
Clock and frame pulse source for ST-BUS, GCI
and other time division multiplex (TDM) buses
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
OSCi OSCo
Master Clock
REF0
REF1
MUX
TIE_CLR
BW_SEL
LOCK
OUT_SEL
C2o
C4/C65o
C8/C32o
C16o
F4/F65o
F8/F32o
F16o
DS1
Synthesizer
C1.5o
TIE
Corrector
Circuit
Virtual
Reference
DPLL
E1
Synthesizer
REF_FAIL0
REF_FAIL1
Reference
Monitor
TIE
Corrector
Enable
Mode
Control
Feedback
REF_SEL
State Machine
RST
Frequency
Select
MUX
IEEE
1149.1a
TRST
MODE_SEL1:0
HMS
HOLDOVER
TCK TDI
TMS TDO
Figure 1 - Functional Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004, Zarlink Semiconductor Inc. All Rights Reserved.

ZL30101QDC相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    T1/E1 System Synchronizer
    ZARLINK
  • 英文版
    T1/E1 System Synchronizer
    ZARLINK [Z...
  • 英文版
    T1/E1 Stratum 3 System Synchronizer
    ZARLINK
  • 英文版
    T1/E1 Stratum 3 System Synchronizer
    ZARLINK [Z...
  • 英文版
    T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for D...
    ZARLINK
  • 英文版
    T1/E1 Stratum 4/4E Redundant System Clock Synchronizer for D...
    ZARLINK [Z...
  • 英文版
    T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for A...
    ZARLINK
  • 英文版
    T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for A...
    ZARLINK [Z...
  • 英文版
    SONET/SDH/PDH Network Interface DPLL
    ZARLINK
  • 英文版
    SONET/SDH/PDH Network Interface DPLL
    ZARLINK [Z...
  • 英文版
    GbE Line Card Synchronizer
    ZARLINK [Z...
  • 英文版
    Network Interface DPLL
    ZARLINK
  • 英文版
    Network Interface DPLL
    ZARLINK [Z...
  • 英文版
    DS1/E1 System Synchronizer with 19.44 MHz Output
    ZARLINK
  • 英文版
    DS1/E1 System Synchronizer with 19.44 MHz Output
    ZARLINK [Z...
  • 英文版
    Telecom Rate Conversion DPLL
    ZARLINK [Z...
  • 英文版
    POTS Line Card PLL
    ZARLINK [Z...
  • 英文版
    SONET/SDH OC-48/OC-192 System Synchronizer
    ZARLINK [Z...
  • 英文版
    SONET/SDH OC-48/OC-192 Line Card Synchronizer
    ZARLINK [Z...
  • 英文版
    Low Jitter Line Card Synchronizer
    ZARLINK [Z...

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務(wù)：
賣家服務(wù)：
技術(shù)客服：

0571-85317607

網(wǎng)站技術(shù)支持

13606545031

客服在線時(shí)間周一至周五
9:00-17:30

關(guān)注官方微信號(hào)，
第一時(shí)間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫(kù)提出的寶貴意見，您的參與是維庫(kù)提升服務(wù)的動(dòng)力！意見一經(jīng)采納，將有感恩紅包奉上哦！