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XRT75L03IV Datasheet

  • XRT75L03IV

  • THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER A...

  • 763.88KB

  • 92頁(yè)

  • EXAR   EXAR

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XRT75L03
THREE CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT WITH JITTER ATTENUATOR
JULY 2003
REV. 1.0.4
GENERAL DESCRIPTION
The XRT75L03 is a three-channel fully integrated
Line Interface Unit (LIU) with Jitter Attenuator for E3/
DS3/STS-1
applications.
It
incorporates
3
independent Receivers, Transmitters and Jitter
Attenuators in a single 128 pin LQFP package.
Each channel of the XRT75L03 can be independently
configured to operate in the data rate, E3 (34.368
MHz), DS3 (44.736 MHz) or STS-1 (51.84 MHz).
Each transmitter can be turned off and tri-stated for
redundancy support or for conserving power.
The XRT75L03鈥檚 differential receiver provides high
noise interference margin and is able to receive the
data over 1000 feet of cable or with up to 12 dB of
cable attenuation.
The XRT75L03 incorporates an advanced crystal-
less jitter attenuator per channel that can be selected
either in the transmit or receive path. The jitter
attenuator performance meets the ETSI TBR-24 and
Bellcore GR-499 specifications.
The XRT75L03 provides both Serial Microprocessor
Interface as well as Hardware mode for programming
and control.
The XRT75L03 supports local, remote and digital
loop-backs. The device also has a built-in Pseudo
Random Binary Sequence (PRBS) generator and
detector with the ability to insert and detect single bit
error for diagnostic purposes.
TRANSMITTER:
鈥?/div>
Compliant with Bellcore GR-499, GR-253 and ANSI
T1.102 Specification for transmit pulse
鈥?/div>
Tri-state Transmit output capability for redundancy
applications
鈥?/div>
Each Transmitter can be turned on or off
鈥?/div>
Transmitters provide Current Output Drive
JITTER ATTENUATOR:
鈥?/div>
On chip advanced crystal-less Jitter Attenuator for
each channel
鈥?/div>
Jitter Attenuator can be selected in Receive or
Transmit paths
鈥?/div>
Meets ETSI TBR 24 Jitter Transfer Requirements
鈥?/div>
Compliant with jitter transfer template outlined in
ITU G.751, G.752, G.755 and GR-499-CORE,1995
standards
鈥?/div>
16 or 32 bits selectable FIFO size
鈥?/div>
Jitter Attenuator can be disabled
CONTROL AND DIAGNOSTICS:
鈥?/div>
5 wire Serial Microprocessor Interface for control
and configuration
鈥?/div>
Supports
monitoring
optional
internal
Transmit
driver
FEATURES
RECEIVER:
鈥?/div>
Hardware Mode for control and configuration
鈥?/div>
Each channel supports Local, Remote and Digital
Loop-backs
鈥?/div>
On chip Clock and Data Recovery circuit for high
input jitter tolerance
鈥?/div>
Meets E3/DS3/STS-1 Jitter Tolerance Requirement
鈥?/div>
Detects and Clears LOS as per G.775
鈥?/div>
Receiver Monitor mode handles up to 20 dB flat
loss with 6 dB cable attenuation
鈥?/div>
Single 3.3 V 鹵 5% power supply
鈥?/div>
5 V Tolerant digital inputs
鈥?/div>
Available in 128 pin LQFP Package
鈥?/div>
- 40擄C to 85擄C Industrial Temperature Range
APPLICATIONS
鈥?/div>
E3/DS3 Access Equipment
鈥?/div>
DSLAMs
鈥?/div>
Digital Cross Connect Systems
鈥?/div>
CSU/DSU Equipment
鈥?/div>
Routers
鈥?/div>
Fiber Optic Terminals
鈥?/div>
On chip B3ZS/HDB3 encoder and decoder that can
be either enabled or disabled
鈥?/div>
On-chip clock synthesizer provides the appropriate
rate clock from a single 12.288 MHz Clock
鈥?/div>
Provides low jitter output clock
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
鈥?/div>
(510) 668-7000
鈥?/div>
FAX (510) 668-7017
鈥?/div>
www.exar.com

XRT75L03IV 產(chǎn)品屬性

  • XRT75L03

  • 72

  • 集成電路 (IC)

  • 接口 - 驅(qū)動(dòng)器，接收器，收發(fā)器

  • -

  • 線路接口裝置（LIU）

  • 3/3

  • DS3，E3，STS-1

  • 3.135 V ~ 3.465 V

  • 表面貼裝

  • 128-LQFP 裸露焊盤

  • 128-LQFP（14x20）

  • 托盤

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