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XRT73L02MIV Datasheet

  • XRT73L02MIV

  • TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT

  • 46頁

  • EXAR   EXAR

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xr
MAY 2003
XRT73L02M
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
REV. 1.0.0
GENERAL DESCRIPTION
The XRT73L02M is a two-channel fully integrated
Line Interface Unit (LIU) for E3/DS3/STS-1 applica-
tions. It incorporates independent Receivers, Trans-
mitters in a single 100 pin TQFP package.
The XRT73L02M can be configured to operate in ei-
ther E3 (34.368 MHz), DS3 (44.736 MHz) or STS-1
(51.84 MHz) modes.The transmitter can be turned off
or tri-stated for redundancy support and for conserv-
ing power.
The XRT73L02M鈥檚 differential receiver provides high
noise interference margin and is able to receive the
data over 1000 feet of cable or with up to 12 dB of ca-
ble attenuation.
The XRT73L02M provides both Serial Microproces-
sor Interface as well as Hardware mode for program-
ming and control.
The XRT73L02M supports local,remote and digital
loop-backs. The XRT73L02M also contains an on-
board Pseudo Random Binary Sequence (PRBS)
generator and detector with the ability to insert and
detect single bit error.
鈥?/div>
Provides low jitter clock outputs for either DS3,E3
or STS-1 rates.
鈥?/div>
On-chip clock synthesizer provides the appropriate
rate clock from a single 12.288 MHz Clock.
鈥?/div>
Provides low jitter output clock.
TRANSMITTER:
鈥?/div>
Compliant with Bellcore GR-499, GR-253 and ANSI
T1.102 Specification for transmit pulse
鈥?/div>
Tri-state Transmit output capability for redundancy
applications
鈥?/div>
Transmitter can be turned on or off.
CONTROL AND DIAGNOSTICS:
鈥?/div>
5 wire Serial Microprocessor Interface for control
and configuration.
鈥?/div>
Supports optional internal Transmit Driver Monitor-
ing.
鈥?/div>
PRBS error counter register to accumulate errors.
鈥?/div>
Hardware Mode for control and configuration.
鈥?/div>
Supports Local, Remote and Digital Loop-backs.
鈥?/div>
Single 3.3 V 鹵 5% power supply.
鈥?/div>
5 V Tolerant I/O.
鈥?/div>
Available in 100 pin TQFP.
鈥?/div>
-40擄C to 85擄C Industrial Temperature Range.
FEATURES
RECEIVER:
鈥?/div>
On chip Clock and Data Recovery circuit for high
input jitter tolerance.
鈥?/div>
Meets the jitter tolerance requirements as specified
in ITU-T G.823_1993 for E3 and Telcordia GR-499-
CORE for DS3 applications.
鈥?/div>
Detects and Clears LOS as per G.775.
鈥?/div>
Receiver Monitor mode handles up to 20 dB flat
loss with 6 dB cable attenuation.
鈥?/div>
On chip B3ZS/HDB3 encoder and decoder that can
either be enabled or disabled.
鈥?/div>
On-chip clock synthesizer generates the appropri-
ate rate clock from a single frequency XTAL.
APPLICATIONS
鈥?/div>
E3/DS3 Access Equipment.
鈥?/div>
STS1-SPE to DS3 Mapper.
鈥?/div>
DSLAMs.
鈥?/div>
Digital Cross Connect Systems.
鈥?/div>
CSU/DSU Equipment.
鈥?/div>
Routers.
鈥?/div>
Fiber Optic Terminals.
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
鈥?/div>
(510) 668-7000
鈥?/div>
FAX (510) 668-7017
鈥?/div>
www.exar.com

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