謾莽
SEPTEMBER 2001
XR17C158
PCI BUS OCTAL UART
REV. 1.1.3
GENERAL DESCRIPTION
The XR17C158
1
(158) is an octal Universal Asyn-
chronous Receiver and Transmitter (UART). The de-
vice is designed to meet the 32-bit PCI Bus and high
bandwidth requirement in communication systems.
The global interrupt source register provides a com-
plete interrupt status indication for all 8 channels to
speed up interrupt parsing. Each UART has its own
16C550 compatible set of configuration registers,
transmit and receive FIFOs of 64 bytes, fully program-
mable transmit and receive FIFO level triggers, trans-
mit and receive FIFO level counters, automatic RTS/
CTS or DTR/DSR hardware flow control with pro-
grammable hysteresis, automatic software (Xon/Xoff)
flow control, IrDA (Infrared Data Association) encod-
er/decoder, 8 multi-purpose definable inputs/outputs,
and a 16-bit general purpose timer/counter.
N
OTE
:
1 Covered by U.S. Patents #5,649,122 and #5,949,787
FEATURES
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High Performance Octal UART
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32-bit PCI Bus Interface with EEPROM Interface
- Interrupt Source Register for all 8 UARTs
- Data Transfer in Byte, Word and Double-word
- Read/Write Burst Operation
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Each UART Includes
- 16C550 Compatible Registers
- 64-byte Transmit and Receive FIFOs
- Transmit and Receive FIFO Level Counters
- Automatic RTS/CTS or DTR/DSR Flow Control
- Automatic Xon/Xoff Software Flow Control
- RS485 Half-duplex Control with Selectable Delay
- Infrared (IrDA 1.0) Data Encoder/Decoder
- Programmable Data Rate with Prescaler
- Up to 6.25 Mbps Serial Data Rate
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Eight Multi-Purpose Inputs/outputs
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A General Purpose 16-bit Timer/Counter
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Sleep Mode with Automatic Wake-up
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5V Operation (PCI Compliance)
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3.3V Operation with 5V Tolerant Inputs
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144-pin TQFP Package (20x20x1.4mm)
APPLICATIONS
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Remote Access Servers
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Ethernet Network to Serial Ports
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Network Management
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Factory Automation and Process Control
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Point-of-Sale Systems
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Multi-port RS-232/RS-422/RS-485 Cards
F
IGURE
1. B
LOCK
D
IAGRAM
CLK
RST#
A D [31 :0 ]
C /B E [3:0 ]#
FRAME#
IR D Y #
TRDY#
DEVSEL#
STOP#
IN T A #
ID S E L
PERR#
SERR#
PAR
U A R T C ha nn el 0
UA RT
Regs
BR G
64 Byte TX FIFO
TX & R X
IR
ENDEC
T X 0, R X 0 , D T R 0 #,
D S R 0 # , R T S 0# ,
C T S 0# , C D 0 #, R I0 #
64 Byte RX FIFO
U A R T C ha nn el 1
P C I L oca l
B us
In te rface
D e vice
C o nfig ura tion
R e giste rs
U A R T C ha nn el 2
U A R T C ha nn el 3
U A R T C ha nn el 4
U A R T C ha nn el 5
C o nfig ura tion
S pa ce
R e giste rs
U A R T C ha nn el 6
U A R T C ha nn el 7
T X 7, R X 7 , D T R 7 #,
D S R 7 # , R T S 7# ,
C T S 7# , C D 7 #, R I7 #
M P IO 0 - M P IO 7
XTAL1
XTAL2
TMRCK
EECK
EEDI
EEDO
EECS
EEPROM
In te rface
1 6-bit
T im er/C o un te r
M ulti-p urpo se
.
In pu ts/O u tpu ts
C rysta l O sc/B uffer
EXAR
Corporation 48720 Kato Road, Fremont CA, 94538
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(510) 668-7000
鈥?/div>
FAX (510) 668-7017
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