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XR16C850IQ Datasheet

  • XR16C850IQ

  • UART|CMOS|QFP|52PIN|PLASTIC

  • 651.96KB

  • 49頁(yè)

  • ETC

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謾莽
APRIL 2002
XR16C854/XR16C854D
3.3V AND 5V QUAD UART WITH 128-BYTE FIFO
REV. 2.0
GENERAL DESCRIPTION
The XR16C854/854D
1
(854) is an enhanced quad
Universal Asynchronous Receiver and Transmitter
(UART) each with 128 bytes of transmit and receive
FIFOs, transmit and receive FIFO counters and trig-
ger levels, automatic hardware and software flow con-
trol, and data rates of up to 2 Mbps. Each UART has
a set of registers that provide the user with operating
status and control, receiver error indications, and mo-
dem serial interface controls. Selectable interrupt po-
larity provides flexibility to meet design require-
ments. An internal loopback capability allows on-
board diagnostics. The 854 is available in 64
pinTQFP, 68 pin PLCC, and 100 pin QFP packages.
The 64 pin package only offers the 16 mode interface,
but the 68 and 100 pin packages offer an additional
68 mode interface which allows easy integration with
Motorola processors. The XR16C854CV (64 pin) of-
fers three state interrupt output while the
XR16C854DV provides continuous interrupt output.
The 100 pin package provides additional FIFO status
outputs (TXRDY# and RXRDY# A-D), separate infra-
red transmit data outputs (IRTX A-D) and channel C
external clock input (CHCCLK). The XR16C854/
854D is compatible with the industry standard
ST16C554/554D and ST16C654/654D.
N
OTE
:
1 Covered by U.S. Patent #5,649,122.
FEATURES
鈥?/div>
Pin-to-pin compatible with the industry standard
ST16C554 and ST16C654 and TI鈥檚 TL16C554N
and TL16C754BFN
鈥?/div>
Intel or Motorola Data Bus Interface
鈥?/div>
Four independent UART channels
鈥?/div>
Register Set Compatible to 16C550
鈥?/div>
Data rates of up to 2 Mbps
鈥?/div>
Transmit and Receive FIFOs of 128 bytes
鈥?/div>
Programmable TX and RX FIFO Trigger Levels
鈥?/div>
Transmit and Receive FIFO Level Counters
鈥?/div>
Automatic Hardware (RTS/CTS) Flow Control
鈥?/div>
Selectable Auto RTS Flow Control Hysteresis
鈥?/div>
Automatic Software (Xon/Xoff) Flow Control
鈥?/div>
Wireless Infrared (IrDA 1.0) Encoder/Decoder
鈥?/div>
Full modem interface
鈥?/div>
3.3 V and 5.0 V supply operation
鈥?/div>
Sleep Mode (200 uA typical)
鈥?/div>
Crystal oscillator or external clock input
APPLICATIONS
鈥?/div>
Portable Appliances
鈥?/div>
Telecommunication Network Routers
鈥?/div>
Ethernet Network Routers
鈥?/div>
Cellular Data Devices
鈥?/div>
Factory Automation and Process Controls
F
IGURE
1. XR16C854 B
LOCK
D
IAGRAM
3.3V or 5V VCC
GND
UART Channel A
UART 128 Byte TX FIFO
Regs
BRG
IR
TX & RX
ENDEC
128 Byte RX FIFO
TXB, RXB, IRTXB, DTRB#,
DSRB#, RTSB#, CTSB#,
CDB#, RIB#, OP2B#
TXC, RXC, IRTXC, DTRC#,
DSRC#, RTSC#, CTSC#,
CDC#, RIC#, OP2C#
TXD, RXD, IRTXD, DTRD#,
DSRD#, RTSD#, CTSD#,
CDD#, RID#, OP2D#
XTAL1
XTAL2
A2:A0
D7:D0
IOR#
IOW#
CSA#
CSB#
CSC#
CSD#
INTA
INTB
INTC
INTD
TXRDY# A-D
RXRDY# A-D
Reset
CHCCLK
16/68#
INTSEL
Data Bus
Interface
TXA, RXA, IRTXA, DTRA#,
DSRA#, RTSA#, CTSA#,
CDA#, RIA#, OP2A#
UART Channel B
(same as Channel A)
UART Channel C
(same as Channel A)
UART Channel C
(same as Channel A)
Crystal Osc/Buffer
854 BLK
Exar
Corporation 48720 Kato Road, Fremont CA, 94538
鈥?/div>
(510) 668-7000
鈥?/div>
FAX (510) 668-7017
鈥?/div>
www.exar.com

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