鈥?/div>
Industry's first TotalCMOS鈩?SPLD - both CMOS
design and process technologies
Fast Zero Power (FZP鈩? design technique provides
ultra-low power and high speed
- Static current of less than 45
碌
A
- Dynamic current substantially below that of
competing devices
- Pin-to-pin delay of only 10 ns
True Zero Power device with no turbo bits or power
down schemes
Function/JEDEC map compatible with Bipolar,
UVCMOS, EECMOS 22V10s
Multiple packaging options featuring PCB-friendly
flow-through pinouts (SOL and TSSOP)
- 24-pin TSOIC鈥搖ses 93% less in-system space than
a 28-pin PLCC
- 24-pin SOIC
- 28-pin PLCC with standard JEDEC pinout
Available in commercial and industrial operating ranges
Supports mixed voltage systems鈥?V tolerant I/Os
Advanced 0.5
碌
E
2
CMOS process
1000 erase/program cycles guaranteed
20 years data retention guaranteed
Varied product term distribution with up to 16 product
terms per output for complex functions
Programmable output polarity
Synchronous preset/asynchronous reset capability
Security bit prevents unauthorized access
Electronic signature for identification
Design entry and verification using industry standard
CAE tools
Reprogrammable using industry standard device
programmers
Description
The XCR22LV10 is the first SPLD to combine high perfor-
mance with low power, without the need for "turbo bits" or
other power down schemes. To achieve this, Xilinx has
used their FZP design technique, which replaces conven-
tional sense amplifier methods for implementing product
terms (a technique that has been used in PLDs since the
bipolar era) with a cascaded chain of pure CMOS gates.
This results in the combination of low power and high
speed that has previously been unattainable in the PLD
arena. For 5V operation, Xilinx offers the XCR22V10 that
offers high speed and low power in a 5V implementation.
The XCR22LV10 uses the familiar AND/OR logic array
structure, which allows direct implementation of
sum-of-products equations. This device has a programma-
ble AND array which drives a fixed OR array. The OR sum
of products feeds an "Output Macro Cell" (OMC), which can
be individually configured as a dedicated input, a combina-
torial output, or a registered output with internal feedback.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Functional Description
The XCR22LV10 implements logic functions as
sum-of-products expressions in a programmable-
AND/fixed-OR logic array. User-defined functions are cre-
ated by programming the connections of input signals into
the array. User-configurable output structures in the form of
I/O macrocells further increase logic flexibility (Figure
1).
DS047 (v1.1) February 10, 2000
www.xilinx.com
1-800-255-7778
1
XCR22LV10-10VO24C相關(guān)型號PDF文件下載
-
型號
版本
描述
廠商
下載
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
XILINX [Xi...
-
英文版
TotalCMOS, Universal PLD Device
-
英文版
TotalCMOS, Universal PLD Device
XILINX [Xi...
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
5V Zero Power, TotalCMOS, Universal PLD Device
Xilinx, Inc
-
英文版
TotalCMOS, Universal PLD Device
-
英文版
TotalCMOS, Universal PLD Device
XILINX [Xi...
-
英文版
TotalCMOS, Universal PLD Device
-
英文版
TotalCMOS, Universal PLD Device
XILINX [Xi...
-
英文版
TotalCMOS, Universal PLD Device
-
英文版
TotalCMOS, Universal PLD Device
XILINX [Xi...
-
英文版
TotalCMOS, Universal PLD Device
-
英文版
TotalCMOS, Universal PLD Device
XILINX [Xi...
-
英文版
TotalCMOS, Universal PLD Device
1
2
3
4
5
6
7
8
9
10
11
12
13
14
