鈥?/div>
10 ns pin-to-pin logic delays on all pins
f
CNT
to 111 MHz
216 macrocells with 4800 usable gates
Up to 166 user I/O pins
5 V in-system programmable
- Endurance of 10,000 program/erase cycles
- Program/erase over full commercial voltage and
temperature range
Enhanced pin-locking architecture
Flexible 36V18 Function Block
- 90 product terms drive any or all of 18 macrocells
within Function Block
- Global and product term clocks, output enables, set
and reset signals
Extensive IEEE Std 1149.1 boundary-scan (JTAG)
support
Programmable power reduction mode in each
macrocell
Slew rate control on individual outputs
User programmable ground pin capability
Extended pattern security features for design protection
High-drive 24 mA outputs
3.3 V or 5 V I/O capability
Advanced CMOS 5V FastFLASH technology
Supports parallel programming of more than one
XC9500 concurrently
Available in 160-pin PQFP, 352-pin BGA, and 208-pin
HQFP packages
Power Management
Power dissipation can be reduced in the XC95216 by con-
figuring macrocells to standard or low-power modes of
operation. Unused macrocells are turned off to minimize
power dissipation.
Operating current for each design can be approximated for
specific operating conditions using the following equation:
I
CC
(mA) =
MC
HP
(1.7) + MC
LP
(0.9) + MC (0.006 mA/MHz) f
Where:
MC
HP
= Macrocells in high-performance mode
MC
LP
= Macrocells in low-power mode
MC = Total number of macrocells used
f = Clock frequency (MHz)
Figure 1
shows a typical calculation for the XC95216
device.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
600
erform
High P
ance
(500)
Typical I
CC
(mA)
400
(360)
(340)
Description
The XC95216 is a high-performance CPLD providing
advanced in-system programming and test capabilities for
general purpose logic integration. It is comprised of twelve
36V18 Function Blocks, providing 4,800 usable gates with
propagation delays of 10 ns. See
Figure 2
for the architec-
ture overview.
Low
200
Power
0
50
Clock Frequency (MHz)
100
X5918
Figure 1: Typical I
CC
vs. Frequency For XC95216
August 21, 2001 (Version 3.1)
1
next
XC95216-10PQ160C 產(chǎn)品屬性
1
集成電路 (IC)
嵌入式 - CPLD(復(fù)雜可編程邏輯器件)
XC9500
系統(tǒng)內(nèi)可編程(最少 10,000 次編程/擦除循環(huán))
10.0ns
4.75 V ~ 5.25 V
12
216
4800
133
0°C ~ 70°C
表面貼裝
160-BQFP
160-PQFP(28x28)
托盤(pán)
122-1391XC95216-10PQ160C-ND
XC95216-10PQ160C相關(guān)型號(hào)PDF文件下載
-
型號(hào)
版本
描述
廠商
下載
-
英文版
2ch. Step-up / down DC/DC Controller ICs
TOREX
-
英文版
2ch. Step-up / down DC/DC Controller ICs
TOREX [Tor...
-
英文版
XC9500 In-System Programmable CPLD Family
-
英文版
XC9500 In-System Programmable CPLD Family
XILINX [Xi...
-
英文版
2ch. Step-up DC/DC Controller ICs.
TOREX
-
英文版
2ch. Step-up DC/DC Controller ICs.
TOREX [Tor...
-
英文版
2ch. Step-up / down DC/DC Controller ICs
TOREX
-
英文版
2ch. Step-up / down DC/DC Controller ICs
TOREX [Tor...
-
英文版
2ch Step-down DC/DC Controller ICs
TOREX [Tor...
-
英文版
2ch. Step-up / Inverting DC/DC Controller ICs
TOREX [Tor...
-
英文版
2ch. Step-Down / Inverting DC/DC Controller ICs
TOREX
-
英文版
2ch. Step-Down / Inverting DC/DC Controller ICs
TOREX [Tor...
-
英文版
Synchronous Step-Down DC/DC Converter with Built-In LDO Regu...
TOREX [Tor...
-
英文版
Synchronous Step-Down DC/DC Converter with Built-In LDO Regu...
TOREX [Tor...
-
英文版
Synchronous Step-Down DC/DC Converter with Built-In LDO Regu...
TOREX
-
英文版
Synchronous Step-Down DC/DC Converter with Built-In LDO Regu...
TOREX [Tor...
-
英文版
2 channel Synchronous Step-Down DC/DC Converter with Manual ...
-
英文版
XC9536 In-System Programmable CPLD
-
英文版
XC9536 In-System Programmable CPLD
XILINX [Xi...
-
英文版
XC9572 In-System Programmable CPLD