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X9400YS24 Datasheet

  • X9400YS24

  • Low Noise/Low Power/SPI Bus

  • 21頁

  • INTERSIL   INTERSIL

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廬
X9400
Low Noise/Low Power/SPI Bus
Data Sheet
March 31, 2005
FN8189.1
Quad Digitally Controlled Potentiometers
(XDCP鈩?
FEATURES
鈥?Four potentiometers per package
鈥?64 resistor taps
鈥?SPI serial interface for write, read, and transfer
operations of the potentiometer
鈥?Wiper resistance, 40鈩?typical at 5V.
鈥?Four non-volatile data registers for each
potentiometer
鈥?Non-volatile storage of multiple wiper position
鈥?Power-on recall. Loads saved wiper position on
power-up.
鈥?Standby current < 1碌A(chǔ) max
鈥?System V
CC
: 2.7V to 5.5V operation
鈥?Analog V
+
/V
鈥?/div>
: -5V to +5V
鈥?10k鈩? 2.5k鈩?End to end resistance
鈥?100 yr. data retention
鈥?Endurance: 100,000 data changes per bit per
register
鈥?Low power CMOS
鈥?24-lead SOIC and 24-lead TSSOP
DESCRIPTION
The X9400 integrates four digitally controlled
potentiometers (XDCPs) on a monolithic CMOS
integrated circuit.
The digitally controlled potentiometer is implemented
using 63 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the SPI
serial bus interface. Each potentiometer has
associated with it a volatile Wiper Counter Register
(WCR) and four nonvolatile Data Registers (DR0-3)
that can be directly written to and read by the user.
The contents of the WCR controls the position of the
wiper on the resistor array through the switches.
Power-up recalls the contents of DR0 to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two-terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
BLOCK DIAGRAM
V
CC
V
SS
V+
V-
HOLD
CS
SCK
SO
SI
A0
A1
WP
Interface
and
Control
Circuitry
Data
R0 R1
Wiper
Counter
Register
(WCR)
Resistor
Array
Pot 1
R0 R1
Pot 0
Wiper
Counter
Register
(WCR)
V
H0
/R
H0
R0 R1
Wiper
Counter
Register
(WCR)
V
H2
/R
H2
R2 R3
V
L0
/R
L0
V
W0
/R
W0
R2 R3
Resistor
Array
Pot 2
V
L2
/R
L2
V
W2
/R
W2
8
V
W1
/R
W1
V
H1
/R
H1
R0 R1
Wiper
Counter
Register
(WCR)
V
W3
/R
W3
V
H3
/R
H3
R2 R3
V
L1
/R
L1
R2 R3
Resistor
Array
Pot 3
V
L3
/R
L3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X9400YS24 產(chǎn)品屬性

  • 30

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 數(shù)字電位器

  • XDCP™

  • 64

  • 2.5k

  • 4

  • 標(biāo)準(zhǔn)值 ±300 ppm/°C

  • 非易失

  • 6 線 SPI（芯片選擇，設(shè)備位址）

  • 4.5 V ~ 5.5 V

  • 0°C ~ 70°C

  • 表面貼裝

  • 24-SOIC（0.295"，7.50mm 寬）

  • 24-SOIC

  • 管件

X9400YS24相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Low Noise/Low Power/SPI Bus
    INTERSIL
  • 英文版
    Quad Digitally Controlled Potentiometers (XDCP)
    XICOR
  • 英文版
    Low Noise/Low Power/SPI Bus
    INTERSIL [...
  • 英文版
    Quad Digitally Controlled Potentiometers (XDCP)
    XICOR [Xic...
  • 英文版
    Low Noise/Low Power/SPI Bus
    INTERSIL
  • 英文版
    Low Noise/Low Power/SPI Bus
    INTERSIL [...
  • 英文版
    Low Noise/Low Power/2-Wire Bus
    INTERSIL
  • 英文版
    Low Noise/Low Power/2-Wire Bus
    INTERSIL [...
  • 英文版
    Low Noise/Low Power/2-Wire Bus
    INTERSIL
  • 英文版
    Quad Digitally Controlled Potentiometers
    XICOR
  • 英文版
    Low Noise/Low Power/2-Wire Bus
    INTERSIL [...
  • 英文版
    Quad Digitally Controlled Potentiometers
    XICOR [Xic...
  • 英文版
    Quad Digitally Controlled Potentiometers
    INTERSIL [...
  • 英文版
    Quad, 64 Tap, Digitally Controlled Potentiometer
    INTERSIL [...
  • 英文版
    Quad Digitally Controlled Potentiometers
    INTERSIL [...
  • 英文版
    Digital Potentiometer
    ETC
  • 英文版
    Digital Potentiometer
  • 英文版
    Low Noise/Low Power/SPI Bus
    INTERSIL
  • 英文版
    Low Noise/Low Power/SPI Bus
    INTERSIL [...
  • 英文版
    Low Noise/Low Power/SPI Bus
    INTERSIL [...

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