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X9259UB24I-2.7 Datasheet

  • X9259UB24I-2.7

  • Quad Digitally-Controlled (XDCP) Potentiometers

  • 25頁

  • XICOR   XICOR

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A
PPLICATION
N
OTES AND
D
EVELOPMENT
S
YSTEM
A V A I L A B L E
AN99 鈥?AN115 鈥?AN124 鈥N133 鈥?AN134 鈥?AN135
Single Supply / Low Power / 256-tap / 2-Wire bus
X9259
Quad Digitally-Controlled (XDCP
TM
) Potentiometers
FEATURES
鈥?Quad鈥揊our separate potentiometers
鈥?256 resistor taps/pot鈥?.4% resolution
鈥?2-Wire Serial Interface for write, read, and
transfer operations of the potentiometer
鈥?Wiper Resistance, 100
鈩?/div>
typical @ V
CC
= 5V
鈥?4 Nonvolatile Data Registers for Each
Potentiometer
鈥?Nonvolatile Storage of Multiple Wiper Positions
鈥?Power On Recall. Loads Saved Wiper Position on
Power Up.
鈥?Standby Current < 5碌A(chǔ) Max
鈥?V
CC
: 2.7V to 5.5V Operation
鈥?50K
鈩?/div>
, 100K
鈩?/div>
versions of End to End Pot
Resistance
鈥?Endurance: 100,000 Data Changes per Bit per
Register
鈥?100 yr. Data Retention
鈥?Single Supply Version of X9258
鈥?24-Lead SOIC, 24-Lead TSSOP, 24-Lead XBGA
鈥?Low Power CMOS
DESCRIPTION
The X9259 integrates 4 digitally controlled
potentiometer (XDCP) on a monolithic CMOS
integrated circuit.
The digital controlled potentiometer is implemented
using 255 resistive elements in a series array. Between
each element are tap points connected to the wiper
terminal through switches. The position of the wiper on
the array is controlled by the user through the 2-Wire
bus interface. Each potentiometer has associated with
it a volatile Wiper Counter Register (WCR) and a four
nonvolatile Data Registers that can be directly written
to and read by the user. The contents of the WCR
controls the position of the wiper on the resistor array
though the switches. Powerup recalls the contents of
the default Data Register (DR0) to the WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
FUNCTIONAL DIAGRAM
V
CC
R
H0
R
H1
R
H2
R
H3
2-Wire
Bus
Interface
Address
Data
Status
Write
Read
Transfer
Inc/Dec
Bus
Interface
and Control
Control
Power On Recall
Wiper Counter
Registers (WCR)
Data Registers
16 Bytes
V
SS
R
W0
R
L0
R
W1
R
L1
R
W2
R
L2
R
W3
R
L3
50K鈩?or 100K鈩?versions
REV 1.2.3 4/30/02
www.xicor.com
Characteristics subject to change without notice.
1 of 25

X9259UB24I-2.7相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Low Noise/Low Power/SPI Bus/256 Taps
    INTERSIL
  • 英文版
    Quad Digitally Controlled Potentiometers (XDCP)
    XICOR
  • 英文版
    Low Noise/Low Power/SPI Bus/256 Taps
    INTERSIL [...
  • 英文版
    Quad Digitally Controlled Potentiometers (XDCP)
    XICOR [Xic...
  • 英文版
    Single Supply/Low Power/256-Tap/SPI Bus
    INTERSIL
  • 英文版
    Quad Digitally-Controlled (XDCP) Potentiometer
    XICOR
  • 英文版
    Quad Digitally-Controlled (XDCP) Potentiometer
    XICOR [Xic...
  • 英文版
    Single Supply/Low Power/256-Tap/SPI Bus
    INTERSIL [...
  • 英文版
    Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface
    INTERSIL
  • 英文版
    Quad Digitally-Controlled (XDCP) potentiometer
    XICOR
  • 英文版
    Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface
    INTERSIL [...
  • 英文版
    Quad Digitally-Controlled (XDCP) potentiometer
    XICOR [Xic...
  • 英文版
    Low Noise/Low Power/2-Wire Bus/256 Taps
    INTERSIL
  • 英文版
    Quad Digital Controlled Potentiometers (XDCP)
    XICOR
  • 英文版
    Low Noise/Low Power/2-Wire Bus/256 Taps
    INTERSIL [...
  • 英文版
    Quad Digital Controlled Potentiometers (XDCP)
    XICOR [Xic...
  • 英文版
    Quad Digitally-Controlled (XDCP) Potentiometers
    XICOR
  • 英文版
    Single Supply/Low Power/256-Tap/2-Wire bus
    INTERSIL
  • 英文版
    Quad Digitally Controlled Potentiometers
    INTERSIL [...
  • 英文版
    Quad Digitally-Controlled (XDCP⑩) Potentiometer
    INTERSIL [...

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