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X9251UV24I-2.7 Datasheet

  • X9251UV24I-2.7

  • Quad Digitally-Controlled (XDCP) Potentiometer

  • 548.61KB

  • 25頁

  • XICOR   XICOR

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A
PPLICATION
N
OTES AND
D
EVELOPMENT
S
YSTEM
A V A I L A B L E
AN99 鈥?AN115 鈥?AN124 鈥N133 鈥?AN134 鈥?AN135
Single Supply / Low Power / 256-tap / SPI bus
X9251
Quad Digitally-Controlled (XDCP
TM
) Potentiometer
FEATURES
鈥?Four potentiometers in one package
鈥?256 resistor taps鈥?.4% resolution
鈥?SPI Serial Interface for write, read, and transfer
operations of the potentiometer
鈥?Wiper resistance: 100
鈩?/div>
typical @ V
CC
= 5V
鈥?4 Non-volatile data registers for each
potentiometer
鈥?Non-volatile storage of multiple wiper positions
鈥?Standby current < 5碌A(chǔ) max
鈥?V
CC
: 2.7V to 5.5V Operation
鈥?50K
鈩?/div>
, 100K
鈩?/div>
versions of total resistance
鈥?100 yr. data retention
鈥?Single supply version of X9250
鈥?Endurance: 100,000 data changes per bit per
register
鈥?24-lead SOIC, 24-lead TSSOP, 24-lead CSP
(Chip Scale Package)
鈥?Low power CMOS
DESCRIPTION
The X9251 integrates four digitally controlled potentio-
meters (XDCP) on a monolithic CMOS integrated
circuit.
The digitally controlled potentiometers are imple-
mented with a combination of resistor elements and
CMOS switches. The position of the wipers are
controlled by the user through the SPI bus interface.
Each potentiometer has associated with it a volatile
Wiper Counter Register (WCR) and four non-volatile
Data Registers that can be directly written to and read
by the user. The content of the WCR controls the
position of the wiper. At power-up, the device recalls
the content of the default Data Registers of each DCP
(DR00, DR10, DR20, and DR30) to the corresponding
WCR.
The XDCP can be used as a three-terminal
potentiometer or as a two terminal variable resistor in
a wide variety of applications including control,
parameter adjustments, and signal processing.
FUNCTIONAL DIAGRAM
V
CC
R
H0
R
H1
R
H2
R
H3
HOLD
A1
A0
SO
SI
SCK
CS
SPI
Interface
WCR0
DR00
DR01
DR02
DR03
DCP0
POWER UP,
INTERFACE
CONTROL
AND
STATUS
WCR1
DR10
DR11
DR12
DR13
DCP1
WCR2
DR20
DR21
DR22
DR23
DCP2
WCR3
DR30
DR31
DR32
DR33
DCP3
V
SS
WP
R
W0
R
L0
R
W1
R
L1
R
W2
R
L2
R
W3
R
L3
REV 1.3.3 2/10/04
www.xicor.com
Characteristics subject to change without notice.
1 of 25

X9251UV24I-2.7 產(chǎn)品屬性

  • 62

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 數(shù)字電位器

  • XDCP™

  • 256

  • 50k

  • 4

  • 標(biāo)準(zhǔn)值 ±300 ppm/°C

  • 非易失

  • 6 線 SPI（芯片選擇，設(shè)備位址）

  • 2.7 V ~ 5.5 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 24-TSSOP（0.173"，4.40mm 寬）

  • 24-TSSOP

  • 管件

X9251UV24I-2.7相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    Low Noise/Low Power/SPI Bus/256 Taps
    INTERSIL
  • 英文版
    Quad Digitally Controlled Potentiometers (XDCP)
    XICOR
  • 英文版
    Low Noise/Low Power/SPI Bus/256 Taps
    INTERSIL [...
  • 英文版
    Quad Digitally Controlled Potentiometers (XDCP)
    XICOR [Xic...
  • 英文版
    Single Supply/Low Power/256-Tap/SPI Bus
    INTERSIL
  • 英文版
    Quad Digitally-Controlled (XDCP) Potentiometer
    XICOR
  • 英文版
    Quad Digitally-Controlled (XDCP) Potentiometer
    XICOR [Xic...
  • 英文版
    Single Supply/Low Power/256-Tap/SPI Bus
    INTERSIL [...
  • 英文版
    Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface
    INTERSIL
  • 英文版
    Quad Digitally-Controlled (XDCP) potentiometer
    XICOR
  • 英文版
    Low Power + Quad 256-Tap + 2-Wire Bus + Up/Down Interface
    INTERSIL [...
  • 英文版
    Quad Digitally-Controlled (XDCP) potentiometer
    XICOR [Xic...
  • 英文版
    Low Noise/Low Power/2-Wire Bus/256 Taps
    INTERSIL
  • 英文版
    Quad Digital Controlled Potentiometers (XDCP)
    XICOR
  • 英文版
    Low Noise/Low Power/2-Wire Bus/256 Taps
    INTERSIL [...
  • 英文版
    Quad Digital Controlled Potentiometers (XDCP)
    XICOR [Xic...
  • 英文版
    Quad Digitally-Controlled (XDCP) Potentiometers
    XICOR
  • 英文版
    Single Supply/Low Power/256-Tap/2-Wire bus
    INTERSIL
  • 英文版
    Quad Digitally Controlled Potentiometers
    INTERSIL [...
  • 英文版
    Quad Digitally-Controlled (XDCP⑩) Potentiometer
    INTERSIL [...

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