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X88C64S Datasheet

  • X88C64S

  • E2 Micro-Peripheral

  • 14頁(yè)

  • XICOR   XICOR

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A
PPLICATION
N
OTE
A V A I L A B L E
AN63
X88C64
8051 Microcontroller Family Compatible
SLIC
64K
X88C64
E
2
Micro-Peripheral
DESCRIPTION
8192 x 8 Bit
FEATURES
鈥?/div>
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鈥?/div>
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CONCURRENT READ WRITE
鈩?/div>
鈥擠ual Plane Architecture
鈥擨solates Read/Write Functions
Between Planes
鈥擜llows Continuous Execution of Code
From One Plane While Writing in
the Other Plane
Multiplexed Address/Data Bus
鈥擠irect Interface to Popular 8051 Family
High Performance CMOS
鈥擣ast Access Time, 120ns
鈥擫ow Power
鈥?0mA Active Maximum
鈥?00
碌
A Standby Maximum
Software Data Protection
Block Protect Register
鈥擨ndividually Set Write Lock Out in 1K Blocks
Toggle Bit Polling
鈥擡arly End of Write Detection
Page Mode Write
鈥擜llows up to 32 Bytes to be Written in
One Write Cycle
High Reliability
鈥擡ndurance: 100,000 Write Cycle
鈥擠ata Retention: 100 Years
The X88C64 is an 8K x 8 E
2
PROM fabricated with
advanced CMOS Textured Poly Floating Gate Tech-
nology. The X88C64 features a Multiplexed Address
and Data bus allowing a direct interface to a variety of
popular single-chip microcontrollers operating in ex-
panded multiplexed mode without the need for addi-
tional interface circuitry.
The X88C64 is internally configured as two indepen-
dent 4K x 8 memory arrays. This feature provides the
ability to perform nonvolatile memory updates in one
array and continue operation out of code stored in the
other array; effectively eliminating the need for an
auxiliary memory device for code storage.
To write to the X88C64, a three-byte command
sequence must precede the byte(s) being written. The
X88C64 also provides a second generation software
data protection scheme called Block Protect. Block
Protect can provide write lockout of the entire device
or selected 1K blocks. There are eight 1K x 8 blocks
that can be write protected individually in any combi-
nation required by the user. Block Protect, in addition
to Write Control input, allows the different segments
of the memory to have varying degrees of alterability
in normal system operation.
FUNCTIONAL DIAGRAM
WC
CE
WR
RD
PSEN
A8鈥揂11
CONTROL
LOGIC
X
D
E
C
O
D
E
SOFTWARE
DATA
PROTECT
A12
1K BYTES
1K BYTES
1K BYTES
1K BYTES
A12
M
U
X
1K BYTES
1K BYTES
1K BYTES
1K BYTES
A12
ALE
L
A
T
C
H
E
S
Y DECODE
I/O & ADDRESS LATCHES AND BUFFERS
A/D0鈥揂/D7
CONCURRENT READ WRITE
鈩?/div>
is a trademark of Xicor, Inc.
漏 Xicor, Inc. 1994, 1995, 1996 Patents Pending
3867-1.5 7/9/96 T0/C2/D0 NS
3867 FHD F02
1
Characteristics subject to change without notice

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