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X88064SI-60 Datasheet

  • X88064SI-60

  • E2 Micro-Peripheral

  • 15頁

  • XICOR   XICOR

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A
PPLICATION
N
OTE
A V A I L A B L E
Application Brief
iAPX88/188, MCS 196, MCS51 Compatible*
64K
X88064
E
2
Microcontroller Peripheral
8192 x 8 Bit
鈥?Block Lock Write Control
鈥擡ight 1K Byte Blocks
- Lockable Independently or in Combination
鈥?Multiplexed Address/Data Bus
鈥擠irect Interface to Popular Microcontrollers
鈥?High Performance CMOS
鈥擣ast Access Times, 60ns and 80 ns
鈥擫ow Power
- 30mA Active Maximum
- 150碌A(chǔ) Standby Maximum
鈥?Software Data Protection
鈥?Toggle Bit Polling
鈥擡arly End of Write Detection
鈥?Page Mode Write
鈥擜llows up to 32 Bytes to be Written in
One Write Cycle
DESCRIPTION
The X88064 is a high speed byte wide microperipheral
device with eight 1K byte blocks of E
2
PROM and can be
directly connected to industry standard high performance
microprocessors. This peripheral provides two levels of
memory write control, the standard Software Data Pro-
gram (SDP) control and Block Lock.
Block Lock provides a higher level of memory write con-
trol above SDP This allows the software developer to
.
partition any or all of the eight 1K byte blocks as In-Circuit
Programmable ROM (ICPROM). Once locked, a block of
memory must 鏗乺st be unlocked before being written. Not
even a write operation using the SDP sequence will
change the contents of a locked block. Since a distinct, 6
byte, software command sequence locks and unlocks
the memory, the software developer has complete con-
trol of the memory contents.
BLOCK LOCK
CONTROL
LOGIC
INDIVIDUALLY LOCKABLE
A/D
0
鈥揂/D
7
L
A
T
C
H
D
E
C
O
D
E
R
E
2
PROM
ARRAY
A
8
鈥揂
12
ALE
1Kx8 BLOCKS
WR
RD
PSEN
CE
WC
INTERFACE
CONTROL
SOFTWARE DATA PROTECT
(SDP)
WE
OE
BUS TRANSCEIVER
POWER-ON RESET
AND V
CC
SENSE
A/D
0
鈥揂/D
7
漏
Xicor, Inc. 1994, 1995, 1996 Patents Pending
* All other brand and product names may be trademarks or
registered trademarks of their respective companies.
7023-2.3 1/29/97 T0/C2/D0 SH
1
Characteristics subject to change without notice

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