128K
X76F128
Secure SerialFlash
DESCRIPTION
16Kx8+64x8
FEATURES
鈥?64-bit Password Security
鈥擣ive 64-bit Passwords for Read, Program
and Reset
鈥?16384 Byte+64 Byte Password Protected Arrays
鈥擲eperate Read Passwords
鈥擲eperate Write Passwords
鈥擱eset Password
鈥?Programmable Passwords
鈥?Retry Counter Register
鈥擜llows 8 tries before clearing of both arrays
鈥擯assword Protected Reset
鈥?32-bit Response to Reset (RST Input)
鈥?64 byte Sector Program
鈥?400kHz Clock Rate
鈥?2 wire Serial Interface
鈥?Low Power CMOS
鈥?.7 to 5.5V operation
鈥擲tandby current Less than 1
碌
A
鈥擜ctive current less than 3 mA
鈥?High Reliability Endurance:
鈥?00,000 Write Cycles
鈥?Data Retention: 100 years
鈥?Available in:
鈥擲martCard Module
鈥擳QFP Package
The X76F128 is a Password Access Security Supervisor,
containing one 131072-bit Secure SerialFlash array and
one 512-bit Secure SerialFlash array. Access to each
memory array is controlled by two 64-bit passwords.
These passwords protect read and write operations of
the memory array. A separate RESET password is used
to reset the passwords and clear the memory arrays in
the event the read and write passwords are lost.
The X76F128 features a serial interface and software
protocol allowing operation on a popular two wire bus.
The bus signals are a clock Input (SCL) and a bidirec-
tional data input and output (SDA). Access to the device
is controlled through a chip select (CS) input, allowing
any number of devices to share the same bus.
The X76F128 also features a synchronous response to
reset providing an automatic output of a hard-wired 32-bit
data stream conforming to the industry standard for
memory cards.
The X76F128 utilizes Xicor鈥檚 proprietary Direct Write
TM
cell, providing a minimum endurance of 100,000 cycles
and a minimum data retention of 100 years.
Functional Diagram
CS
SCL
SDA
INTERFACE
LOGIC
64 BYTE
SerialFlash ARRAY
ARRAY 1
(PASSWORD PROTECTED)
CHIP ENABLE
DATA TRANSFER
ARRAY ACCESS
ENABLE
16K BYTE
SerialFlash ARRAY
ARRAY 0
(PASSWORD PROTECTED)
PASSWORD ARRAY
AND PASSWORD
VERIFICATION LOGIC
RST
RESET
RESPONSE REGISTER
RETRY COUNTER
7052 FM 01
漏
Xicor, Inc. 1994, 1995, 1996 Patents Pending
7052 10/7/97 T0/C0/D0 SH
1
Characteristics subject to change without notice