ISO 7816 Compatible
1K
X76F102
Secure SerialFlash
DESCRIPTION
128 x 8 bit
FEATURES
鈥?64-bit Password Security
鈥?One Array (112 Bytes) Two Passwords (16 Bytes)
鈥擱ead Password
鈥擶rite Password
鈥?Programmable Passwords
鈥?Retry Counter Register
鈥擜llows 8 tries before clearing of the array
鈥?32-bit Response to Reset (RST Input)
鈥?8 byte Sector Write mode
鈥?1MHz Clock Rate
鈥?2 wire Serial Interface
鈥?Low Power CMOS
鈥?.0 to 5.5V operation
鈥擲tandby current Less than 1碌A(chǔ)
鈥擜ctive current less than 3 mA
鈥?High Reliability Endurance:
鈥?00,000 Write Cycles
鈥?Data Retention: 100 years
鈥?Available in:
鈥? lead PDIP, SOIC, MSOP, TSSOP, and Smart
Card Module
The X76F102 is a Password Access Security Supervisor,
containing one 896-bit Secure SerialFlash array. Access
to the memory array can be controlled by two 64-bit
passwords. These passwords protect read and write
operations of the memory array.
The X76F102 features a serial interface and software
protocol allowing operation on a popular two wire bus.
The bus signals are a clock Input (SCL) and a bidirec-
tional data input and output (SDA).
The X76F102 also features a synchronous response to
reset providing an automatic output of a hard-wired 32-bit
data stream conforming to the industry standard for
memory cards.
The X76F102 utilizes Xicor鈥檚 proprietary Direct Write
TM
cell, providing a minimum endurance of 100,000 cycles
and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM
Retry Counter
CHIP ENABLE
DATA TRANSFER
Data Transfer
ARRAYAccess
Array ACCESS
ENABLE
Enable
8K BYTE
SerialFlash ARRAY
Erase Logic 0
ARRAY
(PASSWORD PROTECTED)
CS
SCL
SCL
SDA
SDA
INTERFACE
Interface
LOGIC
Logic
PASSWORD ARRAY
Password Array
AND PASSWORD
and Password
VERIFICATION LOGIC
Verification Logic
RST
RST
RESET
ISO Reset
RESPONSE Register
Response REGISTER
32 BYTE
112 Byte
SerialFlash ARRAY
EEPROM Array
ARRAY 1
(PASSWORD PROTECTED)
RETRY COUNTER
7025 FM 01
漏
Xicor, Inc. 1999 Patents Pending
9900-5004.2 1/26/99 EP
1
Characteristics subject to change without notice