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X76F100S8-3.0 Datasheet

  • X76F100S8-3.0

  • 1K 128 x 8 Bit

  • 17頁(yè)

  • XICOR   XICOR

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X76F100
Secure SerialFlash
128 x 8 Bit
FEATURES
鈥?64-bit password security
鈥?One array (112-bytes) two passwords (16-bytes)
鈥擱ead password
鈥擶rite password
鈥?Programmable passwords
鈥?Retry counter register
鈥擜llows 8 tries before clearing of the array
鈥?32-bit response to reset (rst input)
鈥?8-byte sector Write Mode
鈥?1MHz clock rate
鈥?2-wire serial interface
鈥?Low power CMOS
鈥?.0 to 5.5V operation
鈥擲tandby current less than 1碌A(chǔ)
鈥擜ctive current less than 3 mA
鈥?High reliability endurance:
鈥?00,000 write cycles
鈥?Data retention: 100 years
鈥?Available in:
鈥?-lead PDIP, SOIC, MSOP, and smart car module
DESCRIPTION
The X76F100 is a Password Access Security Supervi-
sor, containing one 896-bit Secure SerialFlash array.
Access to the memory array can be controlled by two
64-bit passwords. These passwords protect read and
write operations of the memory array.
The X76F100 features a serial interface and software
protocol allowing operation on a popular two wire bus.
The bus signals are a clock Input (SCL) and a bidirec-
tional data input and output (SDA). Access to the
device is controlled through a chip select (CS) input,
allowing any number of devices to share the same bus.
The X76F100 also features a synchronous response
to reset providing an automatic output of a hard-wired
32-bit data stream conforming to the industry standard
for memory cards.
The X76F100 utilizes Xicor鈥檚 proprietary Direct Write
鈩?/div>
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
BLOCK DIAGRAM
CS
SCL
SDA
Chip Enable
Data Transfer
Array Access
Enable
Interface
Logic
Password Array
and Password
Verification Logic
RST
Reset
Response Register
Retry Counter
8K Byte
SerialFlash Array
Array 0
(Password Protected)
32 Byte
SerialFlash Array
Array 1
(Password Protected)
REV 1.0 6/22/00
www.xicor.com
Characteristics subject to change without notice.
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