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X68257SM Datasheet

  • X68257SM

  • E2 Micro-Peripheral

  • 14頁

  • XICOR   XICOR

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X68257
68XX Microcontroller Family Compatible
256K
X68257
E
2
Micro-Peripheral
DESCRIPTION
32,768 x 8 Bit
FEATURES
鈥?Multiplexed Address/Data Bus
鈥擠irect Interface to Popular 68HC11 Family
鈥?High Performance CMOS
鈥擣ast Access Time, 120ns
鈥擫ow Power
鈥?0mA Active Maximum
鈥?00
碌
A Standby Maximum
鈥?Software Data Protection
鈥?Toggle Bit Polling
鈥擡arly End of Write Detection
鈥?Page Mode Write
鈥擜llows up to 128 Bytes to be Written in
One Write Cycle
鈥?High Reliability
鈥擡ndurance: 10,000 Write Cycle
鈥擠ata Retention: 100 Years
鈥?28-Lead PDIP Package
鈥?28-Lead SOIC Package
鈥?32-Lead PLCC Package
The X68257 is an 32K x 8 E
2
PROM fabricated with
advanced CMOS Textured Poly Floating Gate Technol-
ogy. The X68257 features a multiplexed address and
data bus allowing direct interface to a variety of popular
single-chip microcontrollers operating in expanded mul-
tiplexed mode without the need for additional interface
circuitry.
FUNCTIONAL DIAGRAM
CE, CE
R/W
E
SEL
A8鈥揂14
CONTROL
LOGIC
X
D
E
C
O
D
E
SOFTWARE
DATA
PROTECT
AS
L
A
T
C
H
E
S
32K x 8
E2PROM
Y DECODE
I/O & ADDRESS LATCHES AND BUFFERS
A/D0鈥揂/D7
6539 ILL F02.2
漏 Xicor, Inc. 1994, 1995, 1996 Patents Pending
6539-1.7 9/16/96 T0/C1/D2 SH
1
Characteristics subject to change without notice

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