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X5169V14-4.5A Datasheet

  • X5169V14-4.5A

  • CPU Supervisor with 16Kbit SPI EEPROM

  • 19頁

  • INTERSIL   INTERSIL

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廬
X5168, X5169
(Replaces X25268, X25169)
Data Sheet
September 16, 2005
FN8130.1
CPU Supervisor with 16Kbit SPI EEPROM
These devices combine three popular functions, Power-on
Reset Control, Supply Voltage Supervision, and Block Lock
Protect Serial EEPROM Memory in one package. This
combination lowers system cost, reduces board space
requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor can execute code.
The device鈥檚 low V
CC
detection circuitry protects the user鈥檚
system from low voltage conditions by holding
RESET/RESET active when V
CC
falls below a minimum V
CC
trip point. RESET/RESET remains asserted until V
CC
returns
to proper operating level and stabilizes. Five industry
standard V
TRIP
thresholds are available, however, Intersil鈥檚
unique circuits allow the threshold to be reprogrammed to
meet custom requirements or to fine-tune the threshold in
applications requiring higher precision.
Features
鈥?Low V
CC
Detection and Reset Assertion
- Five standard reset threshold voltages
- Re-program low V
CC
reset threshold voltage using
special programming sequence
- Reset signal valid to V
CC
= 1V
鈥?Long Battery Life with Low Power Consumption
- <50碌A(chǔ) max standby current, watchdog on
- <1碌A(chǔ) max standby current, watchdog off
- <400碌A(chǔ) max active current during read
鈥?16Kbits of EEPROM
鈥?Built-in Inadvertent Write Protection
- Power-up/power-down protection circuitry
- Protect 0, 1/4, 1/2 or all of EEPROM array with Block
Lock
鈩?/div>
protection
- In circuit programmable ROM mode
鈥?2MHz SPI Interface Modes (0,0 & 1,1)
鈥?Minimize EEPROM Programming Time
- 32-byte page write mode
- Self-timed write cycle
- 5ms write cycle time (typical)
鈥?2.7V to 5.5V and 4.5V to 5.5V Power Supply
Operation
鈥?Available Packages
- 14 Ld TSSOP, 8 Ld SOIC, 8 Ld PDIP
鈥?Pb-Free Plus Anneal Available (RoHS Compliant)
Block Diagram
WP
SI
SO
SCK
CS
Data
Register
Command
Decode &
Control
Logic
Protect Logic
Status
Register
4Kbits
4Kbits
8Kbits
EEPROM Array
Reset
Timebase
RESET/RESET
V
CC
V
TRIP
+
-
Power-on and
Low Voltage
Reset
Generation
X5168 = RESET
X5169 = RESET
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X5169V14-4.5A 產(chǎn)品屬性

  • 95

  • 集成電路 (IC)

  • PMIC - 監(jiān)控器

  • -

  • 簡單復(fù)位/加電復(fù)位

  • 1

  • 開路漏極或開路集電極

  • 高有效

  • 最小為 100 ms

  • 4.63V

  • 0°C ~ 70°C

  • 表面貼裝

  • 14-TSSOP（0.173"，4.40mm 寬）

  • 14-TSSOP

  • 管件

X5169V14-4.5A相關(guān)型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM Description
    INTERSIL
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM Description
    INTERSIL [...
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR [Xic...
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM Description
    INTERSIL
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM Description
    INTERSIL [...
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR [Xic...
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM Description
    INTERSIL
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM Description
    INTERSIL [...
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR [Xic...
  • 英文版
    IC-SM-SUPERVISORY CIRCUIT
    ETC
  • 英文版
    IC-SM-SUPERVISORY CIRCUIT
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM Description
    INTERSIL
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 16Kbit SPI EEPROM
    XICOR [Xic...

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