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X5043PIZ-4.5A Datasheet

  • X5043PIZ-4.5A

  • CPU Supervisor with 4K SPI EEPROM

  • 21頁

  • INTERSIL   INTERSIL

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廬
X5043, X5045
4K, 512 x 8 Bit
Data Sheet
September 16, 2005
FN8126.1
CPU Supervisor with 4K SPI EEPROM
These devices combine four popular functions, Power-on
Reset Control, Watchdog Timer, Supply Voltage Supervision,
and Block Lock Protect Serial EEPROM Memory in one
package. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and oscillator to stabilize
before the processor executes code.
The Watchdog Timer provides an independent protection
mechanism for microcontrollers. When the microcontroller
fails to restart a timer within a selectable time out interval,
the device activates the RESET/RESET signal. The user
selects the interval from three preset values. Once selected,
the interval does not change, even after cycling the power.
The device鈥檚 low V
CC
detection circuitry protects the user鈥檚
system from low voltage conditions, resetting the system
when V
CC
falls below the minimum V
CC
trip point.
RESET/RESET is asserted until V
CC
returns to proper
operating level and stabilizes. Four industry standard V
TRIP
thresholds are available, however, Intersil鈥檚 unique circuits
allow the threshold to be reprogrammed to meet custom
requirements or to fine-tune the threshold for applications
requiring higher precision.
The memory portion of the device is a CMOS Serial
EEPROM array with Intersil鈥檚 block lock protection. The
array is internally organized as 512 x 8. The device features
a Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple four-wire bus.
The device utilizes Intersil鈥檚 proprietary Direct Write
鈩?/div>
cell,
providing a minimum endurance of 100,000 cycles and a
minimum data retention of 100 years.
Features
鈥?Low V
CC
Detection and Reset Assertion
- Four standard reset threshold voltages
4.63V, 4.38V, 2.93V, 2.63V
- Re-program low V
CC
reset threshold voltage using
special programming sequence.
- Reset signal valid to V
CC
= 1V
鈥?Selectable Time Out Watchdog Timer
鈥?Long Battery Life with Low Power Consumption
- <50碌A(chǔ) max standby current, watchdog on
- <10碌A(chǔ) max standby current, watchdog off
鈥?4Kbits of EEPROM鈥?M Write Cycle Endurance
鈥?Save Critical Data with Block Lock
鈩?/div>
Memory
- Protect 1/4, 1/2, all or none of EEPROM array
鈥?Built-in Inadvertent Write Protection
- Write enable latch
- Write protect pin
鈥?SPI Interface - 3.3MHz Clock Rate
鈥?Minimize Programming Time
- 16-byte page write mode
- 5ms write cycle time (typical)
鈥?Available Packages
- 8 Ld MSOP, 8 Ld SOIC, 8 Ld PDIP
- 14 Ld TSSOP
鈥?Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
鈥?Communications Equipment
- Routers, Hubs, Switches
- Set Top Boxes
鈥?Industrial Systems
- Process Control
- Intelligent Instrumentation
鈥?Computer Systems
- Desktop Computers
- Network Servers
鈥?Battery Powered Equipment
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X5043PIZ-4.5A 產(chǎn)品屬性

  • 50

  • 集成電路 (IC)

  • PMIC - 監(jiān)控器

  • -

  • 簡單復(fù)位/加電復(fù)位

  • 1

  • 開路漏極或開路集電極

  • 低有效

  • 最小為 100 ms

  • 4.62V

  • -40°C ~ 85°C

  • 通孔

  • 8-DIP（0.300"，7.62mm）

  • 8-PDIP

  • 管件

X5043PIZ-4.5A相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
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  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    XICOR [Xic...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    XICOR [Xic...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    XICOR
  • 英文版
     SPI Serial EEPROM with Supervisory Features 
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    INTERSIL [...
  • 英文版
    CPU Supervisor with 4K SPI EEPROM
    XICOR [Xic...

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