廬
X4323, X4325
32K, 4K x 8 Bit
Data Sheet
March 29, 2005
FN8122.0
CPU Supervisor with 32K EEPROM
FEATURES
鈥?Selectable watchdog timer
鈥?Low V
CC
detection and reset assertion
鈥擣our standard reset threshold voltages
鈥擜djust low V
CC
reset threshold voltage using
special programming sequence
鈥擱eset signal valid to V
CC
= 1V
鈥?Low power CMOS
鈥?lt;20碌A(chǔ) max standby current, watchdog on
鈥?lt;1碌A(chǔ) standby current, watchdog off
鈥?mA active current
鈥?32Kbits of EEPROM
鈥?4-byte page write mode
鈥擲elf-timed write cycle
鈥?ms write cycle time (typical)
鈥?Built-in inadvertent write protection
鈥擯ower-up/power-down protection circuitry
鈥擝lock Lock (1, 2, 4, 8 pages, all, none)
鈥?400kHz 2-wire interface
鈥?2.7V to 5.5V power supply operation
鈥?Available packages
鈥?-lead SOIC
鈥?-lead TSSOP
DESCRIPTION
The X4323/5 combines four popular functions, Power-
on Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Serial EEPROM Memory in one pack-
age. This combination lowers system cost, reduces
board space requirements, and increases reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable time
out interval, the device activates the RESET/RESET
signal. The user selects the interval from three preset
values. Once selected, the interval does not change,
even after cycling the power.
The device鈥檚 low V
CC
detection circuitry protects the
user鈥檚 system from low voltage conditions, resetting the
system when V
CC
falls below the set minimum V
CC
trip
point. RESET/RESET is asserted until V
CC
returns to
proper operating level and stabilizes. Four industry
standard V
TRIP
thresholds are available, however, Inter-
sil鈥檚 unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
BLOCK DIAGRAM
Watchdog Transition
Detector
WP
Data
Register
Command
Decode &
Control
Logic
V
CC
Threshold
Reset logic
Block Lock Control
Protect Logic
Status
Register
EEPROM Array
RESET (X4323)
RESET (X4325)
Watchdog
Timer Reset
SDA
SCL
S0
S1
Reset &
Watchdog
Timebase
4kb
V
CC
V
TRIP
+
-
Power-on and
Low Voltage
Reset
Generation
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.