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X4045P Datasheet

  • X4045P

  • CPU Supervisor with 4kbit EEPROM

  • 24頁

  • INTERSIL   INTERSIL

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廬
X4043, X4045
4k, 512 x 8 Bit
Data Sheet
September 30, 2005
FN8118.1
CPU Supervisor with 4kbit EEPROM
FEATURES
鈥?Selectable watchdog timer
鈥?Low V
CC
detection and reset assertion
鈥擣ive standard reset threshold voltages
鈥擜djust low V
CC
reset threshold voltage using
special programming sequence
鈥擱eset signal valid to V
CC
= 1V
鈥?Low power CMOS
鈥?lt;20碌A(chǔ) max standby current, watchdog on
鈥?lt;1碌A(chǔ) standby current, watchdog OFF
鈥?mA active current
鈥?4kbits of EEPROM
鈥?6-byte page write mode
鈥擲elf-timed write cycle
鈥?ms write cycle time (typical)
鈥?Built-in inadvertent write protection
鈥擯ower-up/power-down protection circuitry
鈥擯rotect 0, 1/4, 1/2, all or 16, 32, 64 or 128 bytes
of EEPROM array with Block Lock
鈩?/div>
protection
鈥?400kHz 2-wire interface
鈥?2.7V to 5.5V power supply operation
鈥?Available packages
鈥? Ld SOIC
鈥? Ld MSOP
鈥? Ld PDIP
鈥?Pb-free plus anneal available (RoHS compliant)
BLOCK DIAGRAM
Watchdog Transition
Detector
WP
SDA
Data
Register
Command
Decode &
Control
Logic
V
CC
Threshold
Reset logic
Block Lock Control
Protect Logic
Status
Register
EEPROM Array
2Kbits 1Kb 1Kb
DESCRIPTION
The X4043/45 combines four popular functions,
Power-on Reset Control, Watchdog Timer, Supply
Voltage Supervision, and Block Lock Protect Serial
EEPROM Memory in one package. This combination
lowers system cost, reduces board space require-
ments, and increases reliability.
Applying power to the device activates the power-on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscilla-
tor to stabilize before the processor can execute code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the
RESET/RESET signal. The user selects the interval
from three preset values. Once selected, the interval
does not change, even after cycling the power.
The device鈥檚 low V
CC
detection circuitry protects the
user鈥檚 system from low voltage conditions, resetting the
system when V
CC
falls below the minimum V
CC
trip
point. RESET/RESET is asserted until V
CC
returns to
proper operating level and stabilizes. Five industry stan-
dard V
TRIP
thresholds are available, however, Intersil鈥檚
unique circuits allow the threshold to be reprogrammed
to meet custom requirements or to fine-tune the thresh-
old for applications requiring higher precision.
Watchdog
Timer Reset
RESET (X4043)
RESET (X4045)
Reset &
Watchdog
Timebase
SCL
V
CC
V
TRIP
+
-
Power-on and
Low Voltage
Reset
Generation
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X4045P PDF文件相關(guān)型號

X4045PI,X4045PZ,X4165

X4045P 產(chǎn)品屬性

  • 50

  • 集成電路 (IC)

  • PMIC - 監(jiān)控器

  • -

  • 簡單復(fù)位/加電復(fù)位

  • 1

  • 開路漏極或開路集電極

  • 高有效

  • 最小為 100 ms

  • 4.38V

  • 0°C ~ 70°C

  • 通孔

  • 8-DIP（0.300"，7.62mm）

  • 8-PDIP

  • 管件

X4045P相關(guān)型號PDF文件下載

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