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X40430V14I-C Datasheet

  • X40430V14I-C

  • Triple Voltage Monitor with Integrated CPU Supervisor

  • 24頁(yè)

  • INTERSIL   INTERSIL

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廬
X40430, X40431, X40434, X40435
4Kbit EEPROM
FN8251.0
Data Sheet
July 29, 2005
Triple Voltage Monitor with Integrated
CPU Supervisor
FEATURES
鈥?Monitoring voltages: 5V to 9V
鈥?Independent core voltage monitor
鈥?Triple voltage detection and reset assertion
鈥擲tandard reset threshold settings. See selec-
tion table on page 2.
鈥擜djust low voltage reset threshold voltages
using special programming sequence
鈥擱eset signal valid to V
CC
= 1V
鈥擬onitor three separate voltages
鈥?Fault detection register
鈥?Selectable power-on reset timeout
(0.05s, 0.2s, 0.4s, 0.8s)
鈥?Selectable watchdog timer interval
(25ms, 200ms, 1.4s or off)
鈥?Debounced manual reset input
鈥?Low power CMOS
鈥?5碌A(chǔ) typical standby current, watchdog on
鈥?碌A(chǔ) typical standby current, watchdog off
鈥?Memory security
鈥?4Kbits of EEPROM
鈥?6 byte page write mode
鈥?ms write cycle time (typical)
鈥?Built-in inadvertent write protection
鈥擯ower-up/power-down protection circuitry
鈥擝lock lock protect 0, or 1/2, of EEPROM
鈥?400kHz 2-wire interface
鈥?2.7V to 5.5V power supply operation
鈥?Available packages
鈥?4-lead SOIC, TSSOP
APPLICATIONS
鈥?Communication Equipment
鈥擱outers, Hubs, Switches
鈥擠isk Arrays, Network Storage
鈥?Industrial Systems
鈥擯rocess Control
鈥擨ntelligent Instrumentation
鈥?Computer Systems
鈥擟omputers
鈥擭etwork Servers
DESCRIPTION
The X40430, X40431, X40434, X40435 combines
power-on reset control, watchdog timer, supply voltage
supervision, second and third voltage supervision,
manual reset, and Block Lock
鈩?/div>
protect serial EEPROM
in one package. This combination lowers system cost,
reduces board space requirements, and increases
reliability.
Applying voltage to V
CC
activates the power-on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and system oscilla-
tor to stabilize before the processor can execute code.
Low V
CC
detection circuitry protects the user鈥檚 system
from low voltage conditions, resetting the system
when V
CC
falls below the minimum V
TRIP1
point.
RESET/RESET is active until V
CC
returns to proper
operating level and stabilizes. A second and third volt-
age monitor circuit tracks the unregulated supply to
provide a power fail warning or monitors different
power supply voltage. Three common low voltage
combinations are available. However, Intersil鈥檚 unique
circuits allows the threshold for either voltage monitor
to be reprogrammed to meet specific system level
requirements or to fine-tune the threshold for applica-
tions requiring higher precision.
A manual reset input provides debounce circuitry for
minimum reset component count.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the WDO signal.
The user selects the interval from three preset values.
Once selected, the interval does not change, even
after cycling the power.
The memory portion of the device is a CMOS Serial
EEPROM array with Intersil鈥檚 Block Lock protection.
The array is internally organized as x 8. The device
features a 2-wire interface and software protocol
allowing operation on an I
2
C bus.
The device utilizes Intersil鈥檚 proprietary Direct Write
鈩?/div>
cell, providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X40430V14I-C 產(chǎn)品屬性

  • 95

  • 集成電路 (IC)

  • PMIC - 監(jiān)控器

  • -

  • 多壓監(jiān)控器

  • 3

  • 開路漏極，推挽式

  • 高有效/低有效

  • 可調(diào)節(jié)/可選擇

  • 1.7V，2.2V，2.9V

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-TSSOP（0.173"，4.40mm 寬）

  • 14-TSSOP

  • 管件

X40430V14I-C相關(guān)型號(hào)PDF文件下載

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  • 英文版
    CPU Supervisor with 4kbit EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4Kbit EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 4kbit EEPROM
    INTERSIL [...
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    CPU Supervisor with 4Kbit EEPROM
    XICOR [Xic...
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    CPU Supervisor with 4Kbit EEPROM
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    CPU Supervisor with 4kbit EEPROM
    INTERSIL
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL
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    Dual Voltage Monitor with Intergrated CPU Supervisor
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  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
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    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL
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    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    INTERSIL
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    XICOR
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    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    XICOR [Xic...
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    XICOR
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    XICOR [Xic...
  • 英文版
    Triple Voltage Monitor with Integrated CPU Supervisor
    INTERSIL

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