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X40421S14-C Datasheet

  • X40421S14-C

  • Dual Voltage Monitor with Integrated CPU Supervisor and Syst...

  • 25頁

  • XICOR   XICOR

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New Features
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Monitor Voltages: 5V to 1.6V
Memory Security
Battery Switch Backup
V
OUT
5mA to 50mA
Preliminary Datasheet
4kbit EEPROM
X40420/X40421
APPLICATIONS
鈥?Communications Equipment
鈥擱outers, Hubs, Switches
鈥擠isk arrays
鈥?Industrial Systems
鈥擯rocess Control
鈥擨ntelligent Instrumentation
鈥?Computer Systems
鈥擠esktop Computers
鈥擭etwork Servers
X40420/21
Dual Voltage Monitor with Integrated CPU Supervisor and System Battery Switch
FEATURES
鈥?Dual voltage detection and reset assertion
鈥擳hree standard reset threshold settings
(4.6V/2.9V, 4.6V/2.6V, 2.9V/1.6V)
鈥擵
TRIP2
Programmable down to 0.9V
鈥擜djust low voltage reset threshold voltages
using special programming sequence
鈥擱eset signal valid to V
CC
= 1V
鈥擬onitor two voltages or detect power fail
鈥?Battery Switch Backup
鈥?V
OUT
: 5mA to 50mA from V
CC
; or 250碌A from
V
BATT
鈥?Fault detection register
鈥?Selectable power on reset timeout
(0.05s, 0.2s, 0.4s, 0.8s)
鈥?Selectable watchdog timer interval
(25ms, 200ms, 1.4s, off)
鈥?Debounced manual reset input
鈥?Low power CMOS
鈥?5碌A typical standby current, watchdog on
鈥?碌A typical standby current, watchdog off
鈥?碌A typical battery current in backup mode
鈥?4Kbits of EEPROM
鈥?6 byte page write mode
鈥擲elf-timed write cycle
鈥?ms write cycle time (typical)
鈥?Built-in inadvertent write protection
鈥擯ower-up/power-down protection circuitry
鈥擝lock lock protect 0 or 1/2, of EEPROM
鈥?400kHz 2-wire interface
鈥?2.7V to 5.5V power supply operation
鈥?Available packages
鈥?4-lead SOIC, TSSOP
EL
I
M
BLOCK DIAGRAM
V2MON
PR
IN
A
DESCRIPTION
V
OUT
+
V2 Monitor
Logic
V
TRIP2
Standard V
TRIP1
Level Standard V
TRIP2
Level Suffix
4.6V (+/-1%)
2.9V(+/-1.7%)
-A
4.6V (+/-1%)
2.6V (+/-2%)
-B
2.9V(+/-1.7%)
1.6V (+/-3%)
-C
See 鈥淥rdering Information鈥?for more details
For Custom Settings, call Xicor.
The X40420/21 combines power-on reset control,
watchdog timer, supply voltage supervision, and sec-
ondary supervision, manual reset, and Block Lock
鈩?/div>
protect serial EEPROM in one package. This combina-
tion lowers system cost, reduces board space require-
ments, and increases reliability.
Applying voltage to V
CC
activates the power on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and system oscillator
to stabilize before the processor can execute code.
R
Y
V
OUT
V2FAIL
-
SDA
WP
Data
Register
Command
Decode Test
& Control
Logic
Fault Detection
Register
Status
Register
EEPROM
Array
Watchdog
and
Reset Logic
WDO
MR
RESET
X40420
SCL
V
OUT
V
CC
(V1MON)
+
V
CC
Monitor
Logic
System
Battery
Switch
V
TRIP1
-
Power on,
Manual Reset
Low Voltage
Reset
Generation
RESET
X40421
BATT-ON
V
OUT
V
BATT
LOWLINE
REV 1.2.14 7/12/02
www.xicor.com
Characteristics subject to change without notice.
1 of 25

X40421S14-C 產品屬性

  • 50

  • 集成電路 (IC)

  • PMIC - 監(jiān)控器

  • -

  • 多壓監(jiān)控器

  • 2

  • 開路漏極或開路集電極

  • 低有效

  • 可調節(jié)/可選擇

  • 1.6V，2.9V

  • 0°C ~ 70°C

  • 表面貼裝

  • 14-SOIC（0.154"，3.90mm 寬）

  • 14-SOICN

  • 管件

X40421S14-C相關型號PDF文件下載

  • 型號
    版本
    描述
    廠商
    下載
  • 英文版
    CPU Supervisor with 4kbit EEPROM
    INTERSIL
  • 英文版
    CPU Supervisor with 4Kbit EEPROM
    XICOR
  • 英文版
    CPU Supervisor with 4kbit EEPROM
    INTERSIL [...
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    CPU Supervisor with 4Kbit EEPROM
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    CPU Supervisor with 4Kbit EEPROM
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  • 英文版
    CPU Supervisor with 4kbit EEPROM
    INTERSIL
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
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  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
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  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL
  • 英文版
    Dual Voltage Monitor with Intergrated CPU Supervisor
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    INTERSIL
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    XICOR
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    INTERSIL [...
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    XICOR [Xic...
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
    XICOR
  • 英文版
    Dual Voltage Monitor with Integrated CPU Supervisor and Syst...
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  • 英文版
    Triple Voltage Monitor with Integrated CPU Supervisor
    INTERSIL

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