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X40030V14I-C Datasheet

  • X40030V14I-C

  • Triple Voltage Monitor with Intergrated CPU Supervisor

  • 21頁

  • INTERSIL   INTERSIL

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廬
X40030, X40031, X40034, X40035
Data Sheet
April 28, 2005
FN8114.0
PRELIMINARY
Triple Voltage Monitor with Integrated
CPU Supervisor
FEATURES
鈥?Triple voltage detection and reset assertion
鈥擲tandard reset threshold settings
See selection table on page 2.
鈥擜djust low voltage reset threshold voltages
using special programming sequence
鈥擱eset signal valid to V
CC
= 1V
鈥擬onitor three seperate voltages
鈥?Fault detection register
鈥?Selectable power on reset timeout
(0.05s, 0.2s, 0.4s, 0.8s)
鈥?Selectable watchdog timer interval
(25ms, 200ms, 1.4s or off)
鈥?Debounced manual reset input
鈥?Low power CMOS
鈥?5碌A typical standby current, watchdog on
鈥?碌A typical standby current, watchdog off
鈥?400kHz 2-wire interface
鈥?2.7V to 5.5V power supply operation
鈥?Available packages
鈥?4-lead SOIC, TSSOP
鈥?Monitor Voltages: 5V to 0.9V
鈥?Independent Core Voltage Monitor
APPLICATIONS
鈥?Communication Equipment
鈥擱outers, Hubs, Switches
鈥擠isk arrays, Network Storage
BLOCK DIAGRAM
V3MON
鈥?Industrial Systems
鈥擯rocess Control
鈥擨ntelligent Instrumentation
鈥?Computer Systems
鈥擟omputers
鈥擭etwork Servers
DESCRIPTION
The X40030, X40031, X40034, X40035 combines
power-on reset control, watchdog timer, supply voltage
supervision, second and third voltage supervision, and
manual reset, in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
Applying voltage to V
CC
activates the power on reset
circuit which holds RESET/RESET active for a period of
time. This allows the power supply and system oscilla-
tor to stabilize before the processor can execute code.
Low V
CC
detection circuitry protects the user鈥檚 system
from low voltage conditions, resetting the system
when V
CC
falls below the minimum V
TRIP1
point.
RESET/RESET is active until V
CC
returns to proper
operating level and stabilizes. A second and third volt-
age monitor circuit tracks the unregulated supply to
provide a power fail warning or monitors different
power supply voltage. Three common low voltage
combinations are available, however, Intersil鈥檚 unique
circuits allows the threshold for either voltage monitor
to be reprogrammed to meet specific system level
requirements or to fine-tune the threshold for applica-
+
V3 Monitor
Logic
-
V
TRIP3
V3FAIL
V
CC
or
V2MON*
V2FAIL
V
TRIP2
V2MON
+
V2 Monitor
Logic
-
SDA
Data
Register
Command
Decode Test
& Control
Logic
Fault Detection
Register
Status
Register
Watchdog
and
Reset Logic
WDO
WP
MR
SCL
V
CC
(V1MON)
+
V
CC
Monitor
Logic
V
TRIP1
-
Power on,
Manual Reset
Low Voltage
Reset
Generation
RESET
X40030/34
RESET
X40031/35
LOWLINE
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-352-6832
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

X40030V14I-C 產(chǎn)品屬性

  • 95

  • 集成電路 (IC)

  • PMIC - 監(jiān)控器

  • -

  • 多壓監(jiān)控器

  • 3

  • 推挽式，圖騰柱

  • 高有效

  • 可調(diào)節(jié)/可選擇

  • 1.7V，2.2V，2.9V

  • -40°C ~ 85°C

  • 表面貼裝

  • 14-TSSOP（0.173"，4.40mm 寬）

  • 14-TSSOP

  • 管件

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