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X3101PT-V Datasheet

  • X3101PT-V

  • 3 or 4 Cell Li-Ion Battery Protection and Monitor IC

  • 40頁

  • XICOR   XICOR

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A
PPLICATION
N
OTE
A V A I L A B L E
3 or 4 Cell Li-Ion BATTERY PACKS
Preliminary
Preliminary Information
X3100/X3101
FEATURE
鈥?Software Selectable Protection Levels and
Variable Protect Detection/Release Times
鈥?Integrated FET Drive Circuitry
鈥?Cell Voltage and Current Monitoring
鈥?0.5% Accurate Voltage Regulator
鈥?Integrated 4kbit EEPROM
鈥?Flexible Power Management with 1碌A Sleep
Mode
鈥?Cell Balancing Control
BENEFIT
4 cell / 3 cell
3 or 4 Cell Li-Ion Battery Protection and Monitor IC
鈥?Optimize protection for chosen cells to allow
maximum use of pack capacity.
鈥?Reduce component count and cost
鈥?Simplify implementation of gas gauge
鈥?Accurate voltage and current measurements
鈥?Record battery history to optimize gas gauge,
track pack failures and monitor system use
鈥?Reduce power to extend battery life
鈥?Increase battery capacity and improve cycle life
battery life
Using an internal analog multiplexer, the X3100 or
X3101 allow battery parameters such as cell voltage
and current (using a sense resistor) to be monitored
externally by a separate microcontroller with A/D
converter. Software on this microcontroller implements
gas gauge and cell balancing functionality in software.
The X3100 and X3101 contain a current sense
ampli鏗乪r. Selectable gains of 10, 25, 80 and 160 allow
an external 10 bit A/D converter to achieve better
resolution than a more expensive 14 bit converter.
An internal 4kbit EEPROM memory featuring
IDLock
鈩?/div>
, allows the designer to partition and 鈥渓ock in鈥?/div>
written battery cell/pack data.
The X3100 and X3101 are each housed in a 28 Pin
TSSOP package.
DESCRIPTION
The X3100 is a protection and monitor IC for use in
battery packs consisting of 4 series Lithium-Ion
battery cells. The X3101 is designed to work in 3 cell
applications. Both devices provide internal over-
charge, over-discharge, and over-current protection
circuitry, internal EEPROM memory, an internal
voltage regulator, and internal drive circuitry for
external FET devices that control cell charge,
discharge, and cell voltage balancing.
Over-charge, over-discharge, and over-current
thresholds reside in an internal EEPROM memory
register and are selected independently via software
using a 3MHz SPI serial interface. Detection and time-
out delays can also be individually varied using
external capacitors.
FUNCTIONAL DIAGRAM
VCC
RGP RGC RGO
UVP/OCP
OVP/LMON
AS0
AS1
AS2
AO
VCELL1
CB1
VCELL2
CB2
VCELL3
CB3
VCELL4/VSS
CB4
Over-charge
Over-discharge
Protection
Sense
Circuits
Protection
Sample Rate
Timer
5VDC
Regulator
Internal Voltage Regulator
Power On reset &
Status Register
FET Control
Circuitry
Analog
MUX
4 kbit
EEPROM
Over-current
Protection &
Current Sense
Protection Circuit
Timing Control
& Con鏗乬uration
OVT UVT OCT
Con鏗乬uration
Register
Control
Register
S0
SPI
I/F
SCK
CS
SI
VSS
VCS1 VCS2
REV 1.1.8 12/10/02
www.xicor.com
Characteristics subject to change without notice.
1 of 40

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