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X28C64TM-25 Datasheet

  • X28C64TM-25

  • 5 Volt, Byte Alterable E2PROM

  • 112.41KB

  • 25頁

  • XICOR   XICOR

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X28C64
64K
X28C64
5 Volt, Byte Alterable E
2
PROM
DESCRIPTION
8K x 8 Bit
FEATURES
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150ns Access Time
Simple Byte and Page Write
鈥擲ingle 5V Supply
鈥擭o External High Voltages or V
PP
Control
Circuits
鈥擲elf-Timed
鈥擭o Erase Before Write
鈥擭o Complex Programming Algorithms
鈥擭o Overerase Problem
Low Power CMOS
鈥?0mA Active Current Max.
鈥?00
A Standby Current Max.
Fast Write Cycle Times
鈥?4 Byte Page Write Operation
鈥擝yte or Page Write Cycle: 5ms Typical
鈥擟omplete Memory Rewrite: 0.625 sec. Typical
鈥擡ffective Byte Write Cycle Time: 78
s Typical
Software Data Protection
End of Write Detection
鈥擠ATA Polling
鈥擳oggle Bit
High Reliability
鈥擡ndurance: 100,000 Cycles
鈥擠ata Retention: 100 Years
JEDEC Approved Byte-Wide Pinout
The X28C64 is an 8K x 8 E
2
PROM, fabricated with
Xicor鈥檚 proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28C64 is a 5V only device. The
X28C64 features the JEDEC approved pinout for byte-
wide memories, compatible with industry standard RAMs.
The X28C64 supports a 64-byte page write operation,
effectively providing a 78碌s/byte write cycle and en-
abling the entire memory to be typically written in 0.625
seconds. The X28C64 also features
DATA
and Toggle
Bit Polling, a system software support scheme used to
indicate the early completion of a write cycle. In addi-
tion, the X28C64 includes a user-optional software data
protection mode that further enhances Xicor鈥檚 hard-
ware write protect capability.
Xicor E
2
PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
PIN CONFIGURATION
PLASTIC DIP
CERDIP
FLAT PACK
SOIC
NC
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
VSS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
X28C64
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VCC
WE
NC
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/04
I/O3
A6
A5
A4
A3
A2
A1
A0
NC
I/O0
5
6
7
8
9
10
11
12
X28C64
29
28
27
26
25
24
23
22
A8
A9
A11
NC
OE
A10
CE
I/O7
I/O6
LCC
PLCC
VCC
A12
WE
NC
NC
NC
A7
TSOP
A2
A1
A0
I/O0
I/O1
I/O2
NC
VSS
NC
I/O3
I/O4
I/O5
I/O6
I/O7
CE
A10
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A3
A4
A5
A6
A7
A12
NC
NC
VCC
NC
WE
NC
A8
A9
A11
OE
4
3
2
1 32 31 30
X28C64
21
13
14 15 16 17 18 19 20
I/O1
I/O2
VSS
NC
I/O3
I/O4
I/O5
3853 ILL F23.1
3853 FHD F03
3853 FHD F02
漏 Xicor, Inc. 1991, 1995 Patents Pending
3853-2.7 4/2/96 T0/C3/D2 NS
1
Characteristics subject to change without notice

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