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X28C512D-12 Datasheet

  • X28C512D-12

  • 5V, Byte Alterable EEPROM

  • 25頁(yè)

  • INTERSIL   INTERSIL

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X28C512, X28C513
Data Sheet
September 29, 2005
FN8106.1
5V, Byte Alterable EEPROM
The X28C512, X28C513 are 64K x 8 EEPROM, fabricated
with Intersil鈥檚 proprietary, high performance, floating gate
CMOS technology. Like all Intersil programmable nonvolatile
memories, the X28C512, X28C513 are 5V only devices. The
X28C512, X28C513 feature the JEDEC approved pin out for
byte wide memories, compatible with industry standard
EPROMS.
The X28C512, X28C513 support a 128-byte page write
operation, effectively providing a 39碌s/byte write cycle and
enabling the entire memory to be written in less than 2.5
seconds. The X28C512, X28C513 also feature DATA Polling
and Toggle Bit Polling, system software support schemes
used to indicate the early completion of a write cycle. In
addition, the X28C512, X28C513 support the software data
protection option.
Features
鈥?Access Time: 90ns
鈥?Simple Byte and Page Write
- Single 5V supply
鈥?No external high voltages or V
PP
control circuits
- Self-timed
鈥?No erase before write
鈥?No complex programming algorithms
鈥?No overerase problem
鈥?Low Power CMOS
- Active: 50mA
- Standby: 500碌A(chǔ)
鈥?Software Data Protection
- Protects data against system level inadvertent writes
鈥?High Speed Page Write Capability
鈥?Highly Reliable Direct Write
鈩?/div>
Cell
- Endurance: 100,000 write cycles
- Data retention: 100 years
- Early end of write detection
- DATA polling
- Toggle bit polling
鈥?Two PLCC and LCC Pinouts
- X28C512
鈥?X28C010 EPROM pin compatible
- X28C513
鈥?Compatible with lower density EEPROMs
鈥?Pb-Free Plus Anneal Available (RoHS Compliant)
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

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