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X25320VM-2.7 Datasheet

  • X25320VM-2.7

  • SPI Serial E2PROM With Block LockTM Protection

  • 15頁

  • XICOR   XICOR

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A
PPLICATION
N
OTE
A V A I L A B L E
X25320
32K
AN61
X25320
SPI Serial E
2
PROM With Block Lock
TM
Protection
DESCRIPTION
4K x 8 Bit
FEATURES
鈥?2MHz Clock Rate
鈥?SPI Modes (0,0 & 1,1)
鈥?4K X 8 Bits
鈥?32 Byte Page Mode
鈥?Low Power CMOS
鈥?<1
碌
A Standby Current
鈥?<5mA Active Current During Write
鈥?2.7V To 5.5V Power Supply
鈥?Block Lock Protection
鈥?Protect 1/4, 1/2 or all of E
2
PROM Array
鈥?Built-in Inadvertent Write Protection
鈥?Power-Up/Power-Down protection circuitry
鈥?Write Enable Latch
鈥?Write Protect Pin
鈥?Self-Timed Write Cycle
鈥?5ms Write Cycle Time (Typical)
鈥?High Reliability
鈥?Endurance: 100,000 cycles
鈥?Data Retention: 100 Years
鈥?ESD protection: 2000V on all pins
鈥?8-Lead PDlP Package
鈥?8-Lead SOIC Package
鈥?14-Lead TSSOP Package
FUNCTIONAL DIAGRAM
STATUS
REGISTER
WRITE
PROTECT
LOGIC
The X25320 is a CMOS 32768-bit serial E
2
PROM,
internally organized as 4K x 8. The X25320 features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is con-
trolled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25320 also features two additional inputs that
provide the end user with added flexibility. By asserting
the
HOLD
input, the X25320 will ignore transitions on its
inputs, thus allowing the host to service higher priority
interrupts. The
WP
input can be used as a hardwire input
to the X25320 disabling all write attempts to the status
register, thus providing a mechanism for limiting end
user capability of altering 0, 1/4, 1/2 or all of the memory.
The X25320 utilizes Xicor鈥檚 proprietary Direct Write鈩?/div>
cell, providing a minimum endurance of 100,000 cycles
and a minimum data retention of 100 years.
X DECODE
LOGIC
32
4K BYTE
ARRAY
32 X 256
SO
SI
SCK
CS
HOLD
COMMAND
DECODE
AND
CONTROL
LOGIC
32
32 X 256
64
64 X 256
WP
WRITE
CONTROL
AND
TIMING
LOGIC
32
8
Y DECODE
DATA REGISTER
3063 ILL F01
Direct Write鈩?and Block Lock鈩?Protection is a trademark of Xicor, Inc.
漏Xicor, Inc. 1994, 1995, 1996 Patents Pending
3063-3.9 6/11/96 T4/C1/D0 NS
1
Characteristics subject to change without notice

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