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X25040PM-2.7 Datasheet

  • X25040PM-2.7

  • SPI Serial E2PROM with Block LockTM Protection

  • 14頁(yè)

  • XICOR   XICOR

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A
PPLICATION
N
OTES
A V A I L A B L E
AN9 鈥?/div>
X25040
AN18 鈥?AN31 鈥?AN37 鈥?AN40
4K
X25040
SPI Serial E
2
PROM with Block Lock
TM
Protection
DESCRIPTION
512 x 8 Bit
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
1MHz Clock Rate
SPI Modes (0,0 & 1,1)
512 X 8 Bits
鈥? Byte Page Mode
Low Power CMOS
鈥?50
碌
A Standby Current
鈥?mA Active Current
2.7V To 5.5V Power Supply
Block Lock Protection
鈥擯rotect 1/4, 1/2 or all of E
2
PROM Array
Built-in Inadvertent Write Protection
鈥擯ower-Up/Power-Down protection circuitry
鈥擶rite Latch
鈥擶rite Protect Pin
Self-Timed Write Cycle
鈥?ms Write Cycle Time (Typical)
High Reliability
鈥擡ndurance: 100,000 cycles per byte
鈥擠ata Retention: 100 Years
鈥擡SD protection: 2000V on all pins
8-Lead PDlP Package
8-Lead SOIC Package
The X25040 is a CMOS 4096-bit serial E
2
PROM, inter-
nally organized as 512 x 8. The X25040 features a Serial
Peripheral Interface (SPI) and software protocol allow-
ing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is con-
trolled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25040 also features two additional inputs that
provide the end user with added flexibility. By asserting
the
HOLD
input, the X25040 will ignore transitions on its
inputs, thus allowing the host to service higher priority
interrupts. The
WP
input can be used as a hardwire input
to the X25040 disabling all write attempts, thus providing
a mechanism for limiting end user capability of altering
the memory.
The X25040 utilizes Xicor鈥檚 proprietary Direct Write鈩?/div>
cell, providing a minimum endurance of 100,000 cycles
per byte and a minimum data retention of 100 years.
FUNCTIONAL DIAGRAM
STATUS
REGISTER
WRITE
PROTECT
LOGIC
X DECODE
LOGIC
32
SO
SI
SCK
CS
HOLD
COMMAND
DECODE
AND
CONTROL
LOGIC
32
512 BYTE
ARRAY
32 X 32
32 X 32
64
64 X 32
WP
WRITE
CONTROL
AND
TIMING
LOGIC
4
8
Y DECODE
DATA REGISTER
6451 FHD F01
Characteristics subject to change without notice
Direct Write鈩?and Block Lock鈩?Protection is a trademark of Xicor, Inc.
漏Xicor, Inc. 1994, 1995, 1996 Patents Pending
6451-3.6 6/10/96 T5/C1/D0 NS
1

X25040PM-2.7相關(guān)型號(hào)PDF文件下載

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  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR
  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR [Xic...
  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR
  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR [Xic...
  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR
  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR [Xic...
  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR
  • 英文版
    SPI Serial E2PROM with Block LockTM Protection
    XICOR [Xic...
  • 英文版
    Programmable Watchdog Supervisory E2PROM
    XICOR
  • 英文版
    Programmable Watchdog Supervisory E2PROM
    XICOR [Xic...
  • 英文版
    Programmable Watchdog Supervisory E2PROM
    XICOR
  • 英文版
    Programmable Watchdog Supervisory E2PROM
    XICOR [Xic...
  • 英文版
    5MHz Low Power SPI Serial E 2 PROM with IDLock⑩ Memory
    XICOR
  • 英文版
    5MHz Low Power SPI Serial E 2 PROM with IDLock⑩ Memory
    XICOR [Xic...
  • 英文版
    SPI Serial E2PROM With Block LockTM Protection
    XICOR
  • 英文版
    SPI Serial E2PROM With Block LockTM Protection
    XICOR [Xic...
  • 英文版
    5MHz Low Power SPI Serial E 2 PROM with IDLock TM Memory
    XICOR
  • 英文版
    5MHz Low Power SPI Serial E 2 PROM with IDLock TM Memory
    XICOR [Xic...
  • 英文版
    SPI Serial EEPROM
    ETC
  • 英文版
    SPI Serial EEPROM

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