鈥?/div>
1.8V to 3.6V, 2.5V to 5.5V and 4.5V to 5.5V
Power Supply Operation
Low Power CMOS
鈥擜ctive Read Current Less Than 1mA
鈥擜ctive Write Current Less Than 3mA
鈥擲tandby Current Less Than 1
碌
A
400KHz Fast Mode 2-Wire Serial Interface
鈥擠own to 1.8V
鈥擲chmitt Trigger Input Noise Suppression
鈥擮utput Slope Control for Ground Bounce
Noise Elimination
Internally Organized 8K x 8
32 Byte Page Write Mode
鈥擬inimizes Total Write Time Per Byte
Hardware Write Protect
Bidirectional Data Transfer Protocol
Self-Timed Write Cycle
鈥擳ypical Write Cycle Time of 5ms
High Reliability
鈥擡ndurance: 1,000,000 Cycles
鈥擠ata Retention: 100 Years
8-Lead SOIC
The X24641 is a CMOS Serial E
2
PROM Memory,
internally organized 8K x 8. The device features a
serial interface and software protocol allowing opera-
tion on a simple two wire bus. The bus operates at
400KHz all the way down to 1.8V.
Three device select inputs (S
0
鈥揝
2
) allow up to eight
devices to share a common two wire bus.
Hardware Write Protection is provided through a Write
Protect (WP) input pin on the X24641. When the WP
pin is HIGH, the upper quadrant of the Serial E
2
PROM
array is protected against any nonvolatile write
attempts.
Xicor Serial E
2
PROM Memories are designed and
tested for applications requiring extended endurance.
Inherent data retention is greater than 100 years.
FUNCTIONAL DIAGRAM
SERIAL E
2
PROM DATA
AND ADDRESS (SDA)
DATA REGISTER
Y DECODE LOGIC
COMMAND
DECODE
AND
CONTROL
LOGIC
SCL
PAGE
DECODE
LOGIC
S2
S1
S0
DEVICE
SELECT
LOGIC
WRITE
PROTECT
LOGIC
E
2
PROM
ARRAY
8K x 8
WP
WRITE VOLTAGE
CONTROL
7026 FM 01
漏
Xicor, 1995, 1996 Patents Pending
7026 3/27/97 T0/C0/D0 SH
1
Characteristics subject to change without notice