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X24128ZI-2.5 Datasheet

  • X24128ZI-2.5

  • I2C Serial EEPROM

  • 16頁

  • ETC

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Recommended System Management
Alternative: X4283
128K
X24128
400kHz 2-Wire Serial EEPROM with Block Lock
鈩?/div>
16K x 8 Bit
FEATURES
鈥?Save critical data with programmable block lock
protection
鈥擝lock lock (0, 1/4, 1/2, or all of EEPROM array)
鈥擲oftware write protection
鈥擯rogrammable hardware write protect
鈥?In circuit programmable ROM mode
鈥?400kHz 2-wire serial interface
鈥擲chmitt trigger input noise suppression
鈥擮utput slope control for ground bounce noise
elimination
鈥?Longer battery life with lower power
鈥擜ctive read current less than 1mA
鈥擜ctive write current less than 3mA
鈥擲tandby current less than 1碌A(chǔ)
鈥?2.5V to 5.5V power supply version
鈥?32 word page write mode
鈥擬inimizes total write time per word
鈥?Internally organized 16K x 8
鈥?Bidirectional data transfer protocol
鈥?Self-timed write cycle
鈥擳ypical write cycle time of 5ms
鈥?High reliability
鈥擡ndurance: 100,000 cycles
鈥擠ata retention: 100 years
鈥?8-lead XBGA
鈥?14-lead SOIC
DESCRIPTION
The X24128 is a CMOS Serial EEPROM, internally
organized 16K x 8. The device features a serial inter-
face and software protocol allowing operation on a
simple two wire bus.
Three device select inputs (S
0
鈥揝
2
) allow up to eight
devices to share a common two wire bus.
A Write Protect Register at the highest address location,
FFFFh, provides three write protection features: Soft-
ware Write Protect, Block Lock Protect, and Program-
mable Hardware Write Protect. The software write
protect feature prevents any nonvolatile writes to the
device until the WEL bit in the write protect register is
set. The Block Lock protection feature gives the user
four array block protect options, set by programming two
bits in the write protect register. The programmable
hardware write protect feature allows the user to install
the device with WP tied to V
CC
, write to and Block Lock
the desired portions of the memory array in circuit, and
then enable the In Circuit Programmable ROM Mode by
programming the WPEN bit HIGH in the Write Protect
Register. After this, the Block Locked portions of the
array, including the Write Protect Register itself, are per-
manently protected from being erased.
Xicor EEPROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data
retention is greater than 100 years.
BLOCK DIAGRAM
Serial EEPROM Data
and Address (SDA)
Command
Decode
and
Control
Logic
Block Lock and
Write Protect
Control Logic
S
2
S
1
S
0
Device
Select
Logic
Write
Protect
Register
Page
Decode
Logic
Data Register
Y Decode Logic
Serial Eeprom
Array
16k X 8
4k X 8
4k X 8
SCL
8k X 8
WP
REV 1.1 9/8/00
Write Voltage
Control
www.xicor.com
Characteristics subject to change without notice.
1 of 16

X24128ZI-2.5相關(guān)型號PDF文件下載

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  • 英文版
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    ICMIC [IC ...

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