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WS6264LLFP Datasheet

  • WS6264LLFP

  • High Speed Super Low Power SRAM

  • 316.18KB

  • 13頁

  • ETC

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High Speed Super Low Power SRAM
8K-Word By 8 Bit
WS6264
GENERAL DESCRIPTION
The
WS6264
is a high performance, high speed and super low power CMOS Static Random
Access Memory organized as 8,192 words by 8bits and operates from a single 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high speed, super low power features and
maximum access time of 70ns in 5.0V operation. Easy memory expansion is provided by using two chip
enable inputs (/CE1, CE2) and active LOW output enable (/OE).
The
WS6264
has an automatic power down feature, reducing the power consumption significantly
when chip is deselected. The
WS6264
is available in JEDEC standard 28-pin SOP(300 mil) and PDIP
(600 mil) packages.
FEATURES
Operation voltage : 4.5 ~ 5.5V
Ultra low power consumption:
Operating current 1mA@1MHz & CMOS standby current 1.0uA (Typ.) in Vcc=5.0V
High speed access time: 70ns.
Automatic power down when chip is deselected.
Three state outputs and TTL compatible.
Data retention supply voltage as low as 2.0V.
Easy expansion with /CE1, CE2 and /OE options.
PRODUCT FAMILY
Product Family
WS6264LLFP
WS6264LLP
WS6264LLFPI
WS6264LLPI
0~70 C
o
Operating Temp.
Vcc Range
Speed (ns)
Standby Current (Typ.)
I
CCSB1
1.0uA
Package Type
28 SOP
4.5~5.5V
70
28 PDIP
28 SOP
28 PDIP
o
-40~85 C
70
1.0uA
Rev. 1.0
1

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