鈥?/div>
Available in 300 Mil DIP and PLDCC
GENERAL DESCRIPTION
The WS57C49C is a High Performance 64K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM
speeds while consuming only 25% of the power required by its Bipolar counterparts. A further advantage of the
WS57C49C over Bipolar PROM devices is the fact that it utilizes a proven EPROM technology. This enables the
entire memory array to be tested for switching characteristics and functionality after assembly. Unlike devices which
cannot be erased, every WS57C49C in a windowed package is 100% tested with worst case test patterns both
before and after assembly.
The WS57C49C is configured in the standard Bipolar PROM pinout which provides an easy upgrade path for
systems which are currently using Bipolar PROMs, or its predecessor, the WS57C49B.
BLOCK DIAGRAM
PIN CONFIGURATION
TOP VIEW
8
A5 - A12
ROW
ADDRESSES
ROW
DECODER
EPROM ARRAY
Chip Carrier
NC
65,536 BITS
CERDIP/Plastic DIP
Flatpack
A
7
A
6
A
5
A
10
A
4
CS1/V
PP
A
3
A
11
A
2
A
12
A
1
NC
A
0
O
7
O
0
O
6
O
1
O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A
8
A
9
A10
CS1/V
PP
A
11
A
12
O
7
O
6
O
5
O
4
O
3
A
5
A
6
A
7
5
A0 - A4
COLUMN
ADDRESSES
V
CC
A
8
A
9
COLUMN
DECODER
SENSE
AMPLIFIERS
A
4
A
3
A
2
A
1
A
0
NC
O
0
4 3 2
28 27 26
1
5
25
6
24
7
23
8
22
9
21
10
20
11
19
12 13 14 15 16 17 18
O
1
O
2
NC O
3
O
4
O
5
CS1/ V
PP
GND
8
OUTPUTS
PRODUCT SELECTION GUIDE
PARAMETER
Address Access Time (Max)
CS to Output Valid Time (Max)
57C49C-25
25 ns
12 ns
57C49C-35
35 ns
20 ns
57C49C-45
45 ns
25 ns
57C49C-55
55 ns
25 ns
57C49C-70
70 ns
25 ns
Return to Main Menu
2-39