WS512K32V-XXX
HI-RELIABILITY PRODUCT
512Kx32 SRAM 3.3V MODULE
FEATURES
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Access Times of 15, 17, 20ns
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Low Voltage Operation
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Packaging
鈥?66-pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
鈥?68 lead, 22.4mm (0.88") CQFP, 4.6mm (0.180") high,
(Package 509)
PRELIMINARY*
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Low Power CMOS
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TTL Compatible Inputs and Outputs
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Fully Static Operation:
鈥?No clock or refresh required.
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Three State Output.
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Built-in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation
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Weight
WS512K32V-XG2TX - 8 grams typical
WS512K32V-XG1UX - 5 grams typical
WS512K32NV-XH1X - 13 grams typical
* This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
鈥?68 lead, 23.9mm (0.940" sq.) Low Profile CQFP (G1U),
3.56mm (0.140") high, (Package 519)
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Organized as 512Kx32; User Configurable as 1Mx16 or 2Mx8
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Commercial, Industrial and Military Temperature Ranges
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Low Voltage Operation:
鈥?3.3V
鹵
10% Power Supply
PIN CONFIGURATION FOR WS512K32NV-XH1X
TOP VIEW
1
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
A
17
I/O
0
I/O
1
I/O
2
11
22
12
WE
2
CS
2
GND
I/O
11
A
10
A
11
A
12
V
CC
CS
1
NC
I/O
3
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE
A
18
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
44
34
V
CC
CS
4
WE
4
I/O
27
A
3
A
4
A
5
WE
3
CS
3
GND
I/O
19
55
45
I/O
31
I/O
30
56
PIN DESCRIPTION
I/O
0-31
A
0-18
WE
1-4
CS
1-4
I/O
29
I/O
28
A
0
A
1
A
2
WE
1
CS
1
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
OE
V
CC
GND
NC
BLOCK DIAGRAM
WE
2
CS
2
WE
3
CS
3
WE
4
CS
4
OE
A
0-18
512K x 8
512K x 8
I/O
23
I/O
22
512K x 8
512K x 8
I/O
21
I/O
20
66
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
8
8
8
8
May 2001 Rev. 6
1
White Electronic Designs Corporation 鈥?(602) 437-1520 鈥?www.whiteedc.com