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WMF2M8-XDAX5 Datasheet

  • WMF2M8-XDAX5

  • Flash

  • 12頁(yè)

  • ETC

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WMF2M8-XXX5
HI-RELIABILITY PRODUCT
2Mx8 MONOLITHIC FLASH, SMD 5962-97609
FEATURES
s
Access Times of 90, 120, 150ns
s
Packaging:
鈥?56 lead, Hermetic Ceramic, 0.520" CSOP (Package 207).
Fits standard 56 SSOP footprint.
鈥?44 pin Ceramic LCC**
鈥?44 pin Ceramic SOJ (Package 102)**
鈥?44 lead Ceramic Flatpack (Package 225)**
s
Sector Architecture
鈥?32 equal size sectors of 64KBytes each
鈥?Any combination of sectors can be erased. Also supports
full chip erase.
s
100,000 Write/Erase Cycles Minimum
s
Organized as 2Mx8
s
Commercial, Industrial, and Military Temperature Ranges
PRELIMINARY*
s
5 Volt Read and Write. 5V
鹵
10% Supply.
s
Low Power CMOS
s
Data Polling and Toggle Bit feature for detection of program
or erase cycle completion.
s
Supports reading or programming data to a sector not being
erased.
s
RESET pin resets internal state machine to the read mode.
s
Multiple Ground Pins for Low Noise Operation
* This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
* * Package to be developed.
Note: For programming information refer to Flash Programming 16M5
Application Note.
FIG. 1
PIN CONFIGURATION FOR WMF2M8-XXX5
56 CSOP
TOP VIEW
CS
A12
A13
A14
A15
NC
NC
NC
A20
A19
A18
A17
A16
V
CC
GND
I/O6
NC
I/O7
NC
RY/BY
OE
WE
NC
NC
I/O5
NC
I/O4
V
CC
44 CSOJ**
44 FLATPACK**
NC
RESET
A11
A10
A9
A1
A2
A3
A4
A5
A6
A7
GND
A8
V
CC
NC
I/O1
NC
I/O0
A0
NC
NC
NC
I/O2
NC
I/O3
NC
GND
44 CLCC**
TOP VIEW
RESET
V
CC
A
10
A
11
A
12
A
13
A
14
A
15
CS
A
8
A
9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
TOP VIEW
A16
A15
A14
A13
A12
A11
A10
A9
A8
RESET
CS
GND
NC
WE
A7
A6
A5
A4
A3
A2
A1
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A18
OE
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
V
CC
NC
NC
NC
NC
NC
NC
NC
NC
A19
A20
6 5 4 3 2 1 44 43 42 41 40
A
7
A
6
A
5
A
4
NC
NC
NC
A
3
A
2
A
1
A
0
7
8
9
10
11
12
13
14
15
16
17
18 19 20 21 22 23 24 25 26 27 28
I/O
1
I/O
2
I/O
3
V
CC
I/O
4
I/O
5
I/O
6
GND
GND
I/O
7
I/O
0
39
38
37
36
35
34
33
32
31
30
29
A
16
A
17
A
18
A
19
NC
NC
NC
A
20
WE
OE
RY/BY
PIN DESCRIPTION
I/O
0-7
A
0-20
WE
CS
OE
V
CC
GND
RY/BY
RESET
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Select
Output Enable
Power Supply
Ground
Ready/Busy
Reset
** Package to be developed.
December 1999 Rev. 4
1
White Electronic Designs Corporation 鈥?(602) 437-1520 鈥?www.whiteedc.com

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