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WF128K32-XG2LX5 Datasheet

  • WF128K32-XG2LX5

  • Flash MCP

  • 385.60KB

  • 16頁

  • ETC

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White Electronic Designs
FEATURES
n
n
WF128K32-XXX5
128K
X
32 5V FLASH MODULE, SMD 5962-94716
Access Times of 50*, 60, 70, 90, 120, 150ns
Packaging:
聲 66 pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
聲
68 lead, Hermetic CQFP (G2U), 22.4mm (0.880
inch) square, 3.56mm (0.140 inch) high
(Package 510)
68 lead, Hermetic CQFP (G2L), 22.4mm (0.880
inch) square, 4.06mm (0.160 inch) high (Pack
age 528)
n
100,000 Erase/Program Cycles Typical, 0擄C to +70擄C
n
n
n
n
n
Organized as 128Kx32
Commercial, Industrial and Military Temperature
Ranges
5 Volt Programming. 5V 鹵 10% Supply
Embedded Erase and Program Algorithms
TTL Compatible Inputs and CMOS Outputs
Pins for Low Noise Operation
Control Time
n
Low Power CMOS, 1mA Standby Typical
聲
n
Built-in Decoupling Caps and Multiple Ground
n
Page Program Operation and Internal Program
n
聲 68 lead, Hermetic CQFP (G1U)
1
, 23.9mm (0.940
inch) square, 3.56mm (0.140 inch) high
(Package 519)
聲 68 lead, Hermetic CQFP (G1T), 23.9mm (0.940
inch) square, 4.06mm (0.160 inch) high
(Package 524)
n
Sector Architecture
聲 8 equal size sectors of 16KBytes each
聲 Any combination of sectors can be concurrently
erased. Also supports full chip erase
Weight
WF128K32-XG2LX5 - 8 grams typical
WF128K32-XG1UX5
1
- 5 grams typical
WF128K32-XG1TX5 - 5 grams typical
WF128K32-XG2UX5 - 8 grams typical
WF128K32-XH1X5 - 13 grams typical
Note 1: Package Not Recommended For New Design
Note: For programming information refer to Flash Programming 1M5
Application Note.
* The access time of 50ns is available in Industrial and Commercial
temperature ranges only.
FIG. 1
PIN CONFIGURATION FOR WF128K32N-XH1X5
TOP VIEW
I/O
24
I/O
25
I/O
26
A
7
A
12
NC
A
13
A
8
I/O
16
I/O
17
I/O
18
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
NC
I/O
0
I/O
1
I/O
2
WE
2
CS
2
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
V
CC
CS
4
WE
4
I/O
27
A
4
A
5
A
6
WE
3
CS
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
I/O
22
I/O
21
I/O
20
PIN DESCRIPTION
I/O
0-31
A
0-16
WE
1-4
CS
1-4
OE
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
BLOCK DIAGRAM
May 2003 Rev. 6
1
White Electronic Designs Corporation 聲 (602) 437-1520 聲 www.whiteedc.com

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