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WF128K32-90G2I5A Datasheet

  • WF128K32-90G2I5A

  • x32 Flash EEPROM Module

  • 259.91KB

  • 15頁(yè)

  • ETC

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WF128K32-XXX5
HI-RELIABILITY PRODUCT
128K
X
32 5V FLASH MODULE, SMD 5962-94716
FEATURES
s
Access Times of 50*, 60, 70, 90, 120, 150ns
s
Packaging:
鈥?66 pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
鈥?68 lead, 40mm, Low Profile 3.5mm (0.140"), CQFP
(Package 502)
鈥?68 lead, Hermetic CQFP, 22.4mm (0.880 inch) square.
Designed to fit JEDEC 68 lead 0.990" CQFJ footprint.
鈥?G2 (Package 500), 5.08mm (0.200 inch) high
鈥?G2U (Package 510), 3.56mm (0.140 inch) high
s
Sector Architecture
鈥?8 equal size sectors of 16KBytes each
鈥?Any combination of sectors can be concurrently erased.
Also supports full chip erase
s
100,000 Erase/Program Cycles Typical, 0擄C to +70擄C
s
Organized as 128Kx32
s
Commercial, Industrial and Military Temperature Ranges
s
5 Volt Programming. 5V
鹵
10% Supply
s
Low Power CMOS, 1mA Standby Typical
s
Embedded Erase and Program Algorithms
s
TTL Compatible Inputs and CMOS Outputs
s
Built-in Decoupling Caps and Multiple Ground Pins for
Low Noise Operation
s
Page Program Operation and Internal Program Control Time
s
Weight
WF128K32-XG2X5 - 8 grams typical
WF128K32-XG2UX5 - 8 grams typical
WF128K32-XH1X5 - 13 grams typical
WF128K32-XG4TX5 - 20 grams typical
Note: For programming information refer to Flash Programming 1M5
Application Note.
* The access time of 50ns is available in Industrial and Commercial
temperature ranges only.
FIG. 1
1
I/O
8
I/O
9
I/O
10
A
14
A
16
A
11
A
0
NC
I/O
0
I/O
1
I/O
2
11
PIN CONFIGURATION FOR WF128K32N-XH1X5
TOP VIEW
12
WE
2
CS
2
GND
I/O
11
A
10
A
9
A
15
V
CC
CS
1
NC
I/O
3
22
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
7
A
12
NC
A
13
A
8
I/O
16
I/O
17
I/O
18
44
34
V
CC
CS
4
WE
4
I/O
27
A
4
A
5
A
6
WE
3
CS
3
GND
I/O
19
55
45
I/O
31
I/O
30
I/O
29
I/O
28
A
1
A
2
A
3
I/O
23
OE
A
0-16
WE
1
CS
1
PIN DESCRIPTION
56
I/O
0-31
A
0-16
WE
1-4
CS
1-4
OE
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
BLOCK DIAGRAM
WE
2
CS
2
WE
3
CS
3
WE
4
CS
4
I/O
22
128K x 8
128K x 8
128K x 8
128K x 8
I/O
21
I/O
20
66
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
8
8
8
8
June 2000 Rev. 2
1
White Electronic Designs Corporation 鈥?(602) 437-1520 鈥?www.whiteedc.com

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