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WEDPNF8M721V-1215BM Datasheet

  • WEDPNF8M721V-1215BM

  • 8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module Multi-Chip P...

  • 1275.15KB

  • 42頁(yè)

  • ETC

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White Electronic Designs
WEDPNF8M721V-XBX
8Mx72 Synchronous DRAM + 8Mb Flash Mixed Module
Multi-Chip Package
ADVANCED*
FEATURES
n
n
n
Package:
鈥?275 Plastic Ball Grid Array (PBGA), 32mm x 25mm
Commercial, Industrial and Military Temperature Ranges
Weight:
鈥?WEDPNF8M721V-XBX - 2.5 grams typical
n
n
n
n
Sector Architecture
鈥?One 16KByte, two 8KBytes, one 32KByte, and fif
teen 64KBytes in byte mode
鈥?One 8K word, two 4K words, one 16K word, and
fifteen 32K word sectors in word mode.
鈥?Any combination of sectors can be concurrently
erased. Also supports full chip erase
Boot Code Sector Architecture (Bottom)
Embedded Erase and Program Algorithms
Erase Suspend/Resume
鈥?Supports reading data from or programing data to a
sector not being erased
SDRAM PERFORMANCE FEATURES
n
n
n
n
n
n
n
n
Organized as 8M x 72
High Frequency = 100, 125MHz
Single 3.3V 鹵0.3V power supply
Fully Synchronous; all signals registered on positive
edge of system clock cycle
Internal pipelined operation; column address can be
changed every clock cycle
Internal banks for hiding row access/precharge
Programmable Burst length 1,2,4,8 or full page
4096 refresh cycles
BENEFITS
n
n
n
n
n
n
42% SPACE SAVINGS
Reduced part count
Reduced I/O count
鈥?14% I/O Reduction
Suitable for hi-reliability applications
SDRAM Upgradeable to 16M x 72 density (contact
factory for information)
Flash upgradeable to 2M x 8 (or 1M x 16 or 512K x 32)
density
FLASH PERFORMANCE FEATURES
n
n
n
n
User Configurable as 1Mx8 or 512Kx16
Access Times of 100, 120, 150ns
3.3 Volt for Read and Write Operations
1,000,000 Erase/Program Cycles
* This data sheet describes a product that may or may not be under
development and is subject to change or cancellation without notice.
September 2002 Rev. 3
1
White Electronic Designs Corporation 鈥?(602) 437-1520 鈥?www.whiteedc.com

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