White Electronic Designs
RISC Microprocessor Multichip Package
OVERVIEW
The WEDC 755/SSRAM multichip package is targeted for
high performance, space sensitive, low power systems and
supports the following power management features: doze,
nap, sleep and dynamic power management.
The WED3C7558M-XBX multichip package consists of:
鈥?755 RISC processor
鈥?Dedicated 1MB SSRAM L2 cache, configured as
128Kx72
鈥?21mmx25mm, 255 Ceramic Ball Grid Array (CBGA)
鈥?Core Frequency/L2 Cache Frequency (300MHz/
150MHz, 350MHz/175MHz)
鈥?Maximum 60x Bus frequency = 66MHz
WED3C7558M-XBX
The WED3C7558M-XBX is offered in Commercial (0擄C to
+70擄C), industrial (-40擄C to +85擄C) and military (-55擄C to
+125擄C) temperature ranges and is well suited for embed-
ded applications such as missiles, aerospace, flight com-
puters, fire control systems and rugged critical systems.
*This data sheet describes a product that is subject to change without notice.
FEATURES
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Footprint compatible with WED3C750A8M-200BX
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Footprint compatible with Motorola MPC 745
FIG. 1
MULTI-CHIP PACKAGE DIAGRAM
August 2002 Rev. 7
1
White Electronic Designs Corporation 聲 (602) 437-1520 聲 www.whiteedc.com