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WD512K32NV-15G2UCA Datasheet

  • WD512K32NV-15G2UCA

  • 512Kx32 SRAM 3.3V MULTICHIP PACKAGE

  • 7頁

  • WEDC

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White Electronic Designs
512Kx32 SRAM 3.3V MULTICHIP PACKAGE
FEATURES
Access Times of 15, 17, 20ns
Low Voltage Operation
Packaging
鈥?66-pin, PGA Type, 1.075 inch square, Hermetic
Ceramic HIP (Package 400)
鈥?68 lead, 22.4mm (0.880 inch) CQFP, (G2U),
3.56mm (0.140"), (Package 510)
Organized as 512Kx32; User Con鏗乬urable as
2x512Kx16 or 4x512Kx8
Commercial, Industrial and Military Temperature
Ranges
Low Voltage Operation:
鈥?3.3V 鹵 10% Power Supply
Low Power CMOS
WS512K32V-XXX
TTL Compatible Inputs and Outputs
Fully Static Operation:
鈥?No clock or refresh required.
Three State Output.
Built-in Decoupling Caps and Multiple Ground Pins
for Low Noise Operation
Weight
WS512K32V-XG2UX - 8 grams typical
WS512K32NV-XH1X - 13 grams typical
* This product is subject to change without notice.
PIN CONFIGURATION FOR WS512K32NV-XH1X
Top View
1
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
A
17
I/O
0
I/O
1
I/O
2
11
22
12
WE
2
#
CS
2
#
GND
I/O
11
A
10
A
11
A
12
V
CC
CS
1
#
NC
I/O
3
33
23
I/O
15
I/O
14
I/O
13
I/O
12
OE#
A
18
WE
1
#
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
44
34
V
CC
CS
4
#
WE
4
#
I/O
27
A
3
A
4
A
5
WE
3
#
CS
3
#
GND
I/O
19
55
45
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
8
8
8
8
OE#
A
0-18
WE
1
# CS
1
#
Pin Description
56
I/O
0-31
A
0-18
WE
1-4
#
CS
1-4
#
OE#
V
CC
GND
NC
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
Not Connected
Block Diagram
WE
2
# CS
2
#
WE
3
# CS
3
#
WE
4
# CS
4
#
512K x 8
512K x 8
512K x 8
512K x 8
I/O
20
66
I/O
0-7
I/O
8-15
I/O
16-23
I/O
24-31
March 2006
Rev. 12
1
White Electronic Designs Corporation 鈥?(602) 437-1520 鈥?www.wedc.com

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