W83194R-630A
166MHZ CLOCK FOR SIS CHIPSET
1. GENERAL DESCRIPTION
The W83194R-630A is a Clock Synthesizer for SiS 540/630 chipset. W83194R-630A provides all
clocks required for high-speed RISC or CISC microprocessor such as AMD,Cyrix,Intel Pentium,
Pentium II and also provides 16 different frequencies of CPU clocks frequency setting. All clocks are
externally selectable with smooth transitions. The W83194R-630A makes SDRAM in synchronous or
asynchronous frequency with CPU clocks.
The W83194R-630A provides I
2
C serial bus interface to program the registers to enable or disable
each clock outputs and W83194R-630A provides the 0.5%, 0.75% center type and 0~0.5% down type
spread spectrum to reduce EMI.
The W83194R-630A accepts a 14.318 MHz reference crystal as its input and runs on a 3.3V supply.
High drive PCI and SDRAM CLOCK outputs typically provide greater than 1 V /ns slew rate into 30
pF loads. CPU CLOCK outputs typically provide better than 1 V /ns slew rate into 20 pF loads as
maintaining 50鹵 5% duty cycle. The fixed frequency outputs as REF, 24MHz, and 48 MHz provide
better than 0.5V /ns slew rate.
2. PRODUCT FEATURES
鈥?/div>
Supports Pentium鈩? Pentium鈩?II, AMD and Cyrix CPUs with I C.
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3 CPU clocks
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14 SDRAM clocks for 3 DIMMs
鈥?/div>
7 PCI synchronous clocks.
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Optional single or mixed supply:
(All Vdd = 3.3V) or (Other s Vdd = 3.3V, VddLCPU=2.5V)
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Skew form CPU to PCI clock 1 to 4 ns, center 2.6 ns
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SDRAM frequency synchronous or asynchronous to CPU clocks
鈥?/div>
Smooth frequency switch with selections from 66 to 166mhz
鈥?/div>
I
2
C 2-Wire serial interface and I
2
C read back
鈥?/div>
0.5%, 0.75%center type, 0~0.5% down type spread spectrum to reduce EMI
鈥?/div>
Programmable registers to enable/stop each output and select modes
(mode as Tri-state or Normal )
鈥?/div>
48 MHz for USB
鈥?/div>
24 MHz for super I/O
2
鈥?/div>
Packaged in 48-pin SSOP
-1-
Publication Release Date: Nov. 1999
Revision 0.65
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