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W48C101-01 Datasheet

  • W48C101-01

  • Spread Spectrum BX System Frequency Generator

  • 115.35KB

  • 8頁

  • CYPRESS

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PRELIMINARY
W48C101-01
Spread Spectrum BX System Frequency Generator
Features
鈥?Maximized EMI suppression using Cypress鈥檚 Spread
Spectrum technology
鈥?Four copies of CPU output
鈥?Eight copies of PCI output (Synchronous w/CPU
output)
鈥?Two copies of 14.318-MHz IOAPIC output
鈥?Two copies of 48-MHz USB output
鈥?Three buffered copies of 14.318-MHz reference input
鈥?Input is a 14.318-MHz XTAL or reference signal
鈥?Selectable 100-MHz or 66-MHz CPU outputs
鈥?Power management control input pins
鈥?Test mode and output three-state capability
CPU0:3 Clock Skew: ...................................................175 ps
PCI_F, PCI1:7 Clock Skew: ......................................... 500 ps
CPU to PCI Clock Skew: .............. 1.5 to 4.0 ns (CPU Leads)
Logic inputs have 250-k鈩?pull-up resistors except SEL100/66#.
Table 1. Pin Selectable Frequency
SEL
100/66#
0
0
0
0
1
1
1
1
SEL1
0
0
1
1
0
0
1
1
SEL0
0
1
0
1
0
1
0
1
CPU
PCI
(MHz) (MHz)
HI-Z
66.6
66.6
66.6
X1/2
100
100
100
HI-Z
33.3
33.3
33.3
X1/6
33.3
33.3
33.3
SPREAD#=0
Don鈥檛 Care
鹵0.9% Center
鈥?% Down
鈥?.5% Down
Don鈥檛 Care
鹵0.9% Center
鈥?% Down
鈥?.5% Down
Key Specifications
Supply Voltages: ....................................... V
DDQ3
= 3.3V鹵5%
V
DDQ2
= 2.5V鹵5%
CPU0:3 Jitter (Cycle to Cycle): ................................... 200 ps
Block Diagram
VDDQ3
REF0
X1
X2
XTAL
OSC
PLL Ref Freq
VDDQ2
APIC0
APIC1
VDDQ2
CPU_STOP#
Stop
Clock
Control
SEL100/66#
SEL0
SEL1
SPREAD#
PLL 1
梅2/梅3
VDDQ3
PCI_F
Stop
Clock
Control
PCI_STOP#
PCI1
PCI2
PCI3
CPU0
CPU1
REF1
REF2
Pin Configuration
REF0
REF1
GND
X1
X2
GND
PCI_F
PCI1
VDDQ3
PCI2
PCI3
GND
PCI4
PCI5
VDDQ3
PCI6
PCI7
GND
VDDQ3
GND
VDDQ3
48MHz
48MHz
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VDDQ3
REF2
VDDQ2
APIC0
APIC1
GND
NC
VDDQ2
CPU0
CPU1
GND
VDDQ2
CPU2
CPU3
GND
VDDQ3
GND
PCI_STOP#
CPU_STOP#
PWR_DWN#
SPREAD#
SEL0
SEL1
SEL100/66#
CPU2
CPU3
PCI4
PCI5
PWR_DWN#
Power
Down
Control
PCI6
PCI7
VDDQ3
PLL2
48MHz
48MHz
Cypress Semiconductor Corporation
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?/div>
408-943-2600
October 7, 1999, rev. **

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