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W25P022AD-7 Datasheet

  • W25P022AD-7

  • 64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM

  • 310.74KB

  • 17頁(yè)

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W25P022A
64K
脳
32 BURST PIPELINED HIGH-SPEED
CMOS STATIC RAM
GENERAL DESCRIPTION
The W25P022A is a high-speed, low-power, synchronous-burst pipelined CMOS static RAM
organized as 65,536
脳
32 bits that operates on a single 3.3-volt power supply. A built-in two-bit burst
address counter supports both Pentium鈩?burst mode and linear burst mode. The mode to be
executed is controlled by the LBO pin. Pipelining or non-pipelining of the data outputs is controlled by
the FT pin. A snooze mode reduces power dissipation.
The W25P022A supports both 2T/2T mode and 2T/1T mode, which can be selected by pin 42. The
default mode is 2T/1T, with pin 42 low. To switch to 2T/2T mode, bias pin 42 to V
DDQ
. The state of
pin 42 should not be changed after power up. The 2T/2T mode will sustain one cycle of valid data
output in a burst read cycle when the device is deselected by CE2/
CE3
. This mode supports 3-1-1-1-
1-1-1-1 in a two-bank, back-to-back burst read cycle. On the other hand, the 2T/1T mode disables
data output within one cycle in a burst read cycle when the device is deselected by CE2/
CE3
. In this
mode, the device supports only 3-1-1-1-2-1-1-1 in a two-bank, back-to-back burst read cycle.
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Synchronous operation
High-speed access time: 6/7 nS (max.)
Single +3.3V power supply
Individual byte write capability
3.3V LVTTL compatible I/O
Clock-controlled and registered input
Asynchronous output enable
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Pipelined/non-pipelined data output capability
Supports snooze mode (low-power state)
Internal burst counter supports Intel burst mode
& linear burst mode
Supports both 2T/2T & 2T/1T mode
Packaged in 100-pin QFP or TQFP
BLOCK DIAGRAM
A(15:0)
INPUT
REGISTER
64K X 32
CORE
ARRAY
CLK
CE(3:1)
GW
BWE
BW(4:1)
OE
ADSC
ADSP
ADV
LBO
FT
ZZ
MS
CONTROL
LOGIC
REGISTE
R
DATA I/O
REGISTER
I/O(32:1)
-1-
Publication Release Date: September 1996
Revision A1

W25P022AD-7相關(guān)型號(hào)PDF文件下載

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  • 英文版
    1M-BIT, 2M-BIT AND 4M-BIT SERIAL FLASH MEMORY WITH 40MHZ SPI
    WINBOND [W...
  • 英文版
    Memory
    Winbond
  • 英文版
    1M-BIT, 2M-BIT AND 4M-BIT SERIAL FLASH MEMORY WITH 40MHZ SPI
    WINBOND [W...
  • 英文版
    1M-BIT, 2M-BIT AND 4M-BIT SERIAL FLASH MEMORY WITH 40MHZ SPI
    WINBOND [W...
  • 英文版
    8M-BIT AND 16M-BIT SERIAL FLASH MEMORY
    WINBOND [W...
  • 英文版
    32k x 32 burst pipelined SRAM
    Winbond
  • 英文版
    32K*32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    Winbond
  • 英文版
    64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND
  • 英文版
    64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND [W...
  • 英文版
    64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND
  • 英文版
    64K X 32 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND [W...
  • 英文版
    64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND
  • 英文版
    64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND [W...
  • 英文版
    64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND
  • 英文版
    64K X 64 BURST PIPELINED HIGH-SPEED CMOS STATIC RAM
    WINBOND [W...
  • 英文版
    8M-BIT AND 16M-BIT SERIAL FLASH MEMORY
    WINBOND [W...
  • 英文版
    8M-BIT AND 16M-BIT SERIAL FLASH MEMORY
    WINBOND [W...
  • 英文版
    8M-BIT AND 16M-BIT SERIAL FLASH MEMORY
    WINBOND [W...
  • 英文版
    8M-BIT AND 16M-BIT SERIAL FLASH MEMORY
    WINBOND [W...
  • 英文版
    8M-BIT AND 16M-BIT SERIAL FLASH MEMORY
    WINBOND [W...

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