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W24L257S70LL Datasheet

  • W24L257S70LL

  • x8 SRAM

  • 11頁(yè)

  • ETC

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W24L257
32K
脳
8 CMOS STATIC RAM
GENERAL DESCRIPTION
The W24L257 is a normal-speed, very low-power CMOS static RAM organized as 32768
脳
8 bits that
operates on a wide voltage range from 3V to 5.5V power supply. This device is manufactured using
Winbond's high performance CMOS technology.
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Low power consumption:
Access time: 70 nS
3.3V/5V power supply
Fully static operation
All inputs and outputs directly TTL compatible
鈥?/div>
Three-state outputs
鈥?/div>
Battery back-up operation capability
鈥?/div>
Data retention voltage: 2V (min.)
鈥?/div>
Packaged in 330 mil SOP, and standard type
one STSOP (8 mm
脳
13.4 mm)
PIN CONFIGURATIONS
BLOCK DIAGRAM
CLK GEN.
A12
PRECHARGE CKT.
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O1
I/O2
I/O3
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VDD
#WE
A13
A8
A14
A2
A3
A4
A5
R
O
W
D
E
C
O
D
E
R
CORE CELL ARRAY
512 ROWS
32 X 8 COLUMNS
A9
A11
#OE
A10
CS
I/O8
I/O7
I/O6
I/O5
I/O4
A6
A7
A13
I/O1
:
I/O8
DATA
CNTRL
.
CLK
GEN.
I/O CKT.
COLUMN DECODER
#WE
#CS
#OE
A11 A10 A1 A0 A8 A9
PIN DESCRIPTION
#OE
A11
A9
A8
A13
#W
E
V
DD
A14
A12
A7
A6
A5
A4
A3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
#CS
I/O8
I/O7
I/O6
I/O5
I/O4
V
SS
I/O3
I/O2
I/O1
A0
A1
A2
28-pin
TSOP
SYMBOL
A0
鈭?/div>
A14
I/O1
鈭?/div>
I/O8
#CS
#WE
#OE
V
DD
V
SS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
-1-
Publication Release Date: October 3, 2001
Revision A5

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