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W24L11

128K

脳

8 CMOS STATIC RAM

GENERAL DESCRIPTION

The W24L11 is a normal-speed, very low-power CMOS static RAM organized as 131072

脳

8 bits that

operates on a wide voltage range from 3.0V to 3.6V power supply. This device is manufactured using

Winbond's high performance CMOS technology.

FEATURES

鈥?/div>

Low power consumption:

鈭?/div>

Active: 144 mW (max.)

Access time: 70 nS

Single 3.3V power supply

Fully static operation

All inputs and outputs directly TTL compatible

鈥?/div>

Three-state outputs

Battery back-up operation capability

Data retention voltage: 2V (min.)

Packaged 450 mil SOP, standard type one,

TSOP (8 mm

脳

20 mm), small type one and

TSOP (8 mm

脳

13.4 mm)

PIN CONFIGURATIONS

BLOCK DIAGRAM

CLK GEN.

A16

A14

PRECHARGE CKT.

NC

A16

A14

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O1

I/O2

I/O3

V

SS

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

32

31

30

29

28

27

26

V

DD

A15

CS2

WE

A13

A8

A9

A11

OE

A10

CS1

I/O8

I/O7

I/O6

I/O5

I/O4

A12

A4

A3

A2

A7

A6

A5

A9

I/O1

:

I/O8

R

O

W

D

E

C

O

D

E

R

CORE CELL ARRAY

1024 ROWS

128 X 8 COLUMNS

32-pin

SOP

DATA

CNTRL.

CLK

GEN.

25

24

23

22

21

20

19

18

17

I/O CKT.

COLUMN DECODER

WE

CS1

CS2

OE

A15 A13 A8 A1 A0 A11A10

PIN DESCRIPTION

32

31

30

29

28

27

26

25

24

23

22

21

20

19

18

17

OE

A10

CS1

I/O8

I/O7

I/O6

I/O5

I/O4

V

SS

I/O3

I/O2

I/O1

A0

A1

A2

A3

A11

A9

A8

A13

WE

CS2

A15

V

DD

NC

A16

A14

A12

A7

A6

A5

A4

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

SYMBOL

A0鈭扐16

I/O1鈭捍/O8

CS1, CS2

WE

OE

V

DD

V

SS

NC

DESCRIPTION

Address Inputs

Data Inputs/Outputs

Chip Select Input

Write Enable Input

Output Enable Input

Power Supply

Ground

No Connection

32-pin

TSOP

-1-

Publication Release Date: May 2000

Revision A2

型號

版本

描述

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