音影先锋亚洲天堂网|电影世界尽头的爱完整版播放|国产 熟女 91|高清无码免费观看欧美日韩|韩国一区二区三区黄色录像|美女亚洲加勒比在线|亚洲综合网 开心五月|7x成人在线入口|成人网站免费日韩毛片区|国产黄片?一级?二级?三级

W230-03 Datasheet

  • W230-03

  • Spread Spectrum FTG for VIA K7 Chipset

  • 178.07KB

  • 15頁

  • CYPRESS

掃碼查看芯片數(shù)據(jù)手冊

上傳產(chǎn)品規(guī)格書

PDF預覽

3
PRELIMINARY
W230-03
Spread Spectrum FTG for VIA K7 Chipset
Features
鈥?Maximized EMI Suppression using Cypress鈥檚 Spread
Spectrum technology
鈥?Single-chip system frequency synthesizer for VIA K7
chipset
鈥?Two copies of CPU output
鈥?Six copies of PCI output
鈥?One 48-MHz output for USB
鈥?One 24-MHz or 48-MHz output for SIO
鈥?Two buffered reference outputs
鈥?Thirteen SDRAM outputs provide support for 3 DIMMs
鈥?Supports frequencies up to 200 MHz
鈥?I
2
C鈩?interface for programming
鈥?Power management control inputs
鈥?Available in 48-pin SSOP
Table 2. Pin Selectable Frequency
Input Address
CPU_CS
CPUT0
FS3 FS2 FS1 FS0
(MHz)
1
1
1
1
100.0
1
1
1
0
100.0
1
1
0
1
100.0
1
1
0
0
95.0
1
0
1
1
133.3
1
0
1
0
133.3
1
0
0
1
133.3
1
0
0
0
102.0
0
1
1
1
104.0
0
1
1
0
106.0
0
1
0
1
107.0
0
1
0
0
108.0
0
0
1
1
109.0
0
0
1
0
110.0
0
0
0
1
111.0
0
0
0
0
112.0
PCI 0:5
(MHz)
33.3
33.3
33.3
31.7
33.3
33.3
33.3
34.0
34.6
35.3
35.6
36.0
36.3
36.6
37.0
37.3
Spread
Spectrum
鈥?.5%
OFF
鹵0.5%
OFF
鈥?.5%
OFF
鹵0.5%
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Key Specifications
CPU to CPU Output Skew: ......................................... 175 ps
PCI to PCI Output Skew: ............................................ 500 ps
V
DDQ3
: .................................................................... 3.3V鹵5%
SDRAMIN to SDRAM0:12 Delay: ..........................3.7 ns typ.
Table 1. Mode Input Table
Mode
Pin 2
0
CPU_STOP#
1
REF0
Block Diagram
VDDQ3
REF0/(CPU_STOP#)
X1
X2
XTAL
OSC
PLL Ref Freq
Pin Configuration
[1]
REF1/FS0
I/O Pin
Control
PWRDWN#
CPU_CS
Stop
Clock
Control
梅2,3,4
PLL 1
CPUT0
CPUC0
VDDQ3
PCI0/MODE
PCI1/FS1
PCI2
PCI3
PCI4
PCI5
VDDQ3
48MHz/FS2
SDATA
SCLK
I
2
C
Logic
PLL2
梅2
VDDQ3
REF0/(CPU_STOP#)
GND
X1
X2
VDDQ3
PCI0/MODE
PCI1/FS1*
GND
PCI2
PCI3
PCI4
PCI5
VDDQ3
SDRAMIN
GND
SDRAM11
SDRAM10
VDDQ3
SDRAM9
SDRAM8
GND
SDATA
I
2
C
SCLK
{
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
REF1/FS0*
GND
CPU_CS
GND
CPUC0
CPUT0
VDDQ3
PWRDWN#*
SDRAM12
GND
SDRAM0
SDRAM1
VDDQ3
SDRAM2
SDRAM3
GND
SDRAM4
SDRAM5
VDDQ3
SDRAM6
SDRAM7
VDDQ3
48MHz/FS2*
24_48MHz/FS3^
SDRAMIN
13
24_48MHz/FS3
VDDQ3
SDRAM0:12
Note:
1. Internal pull-up resistors should not be relied upon for setting I/O
pins HIGH. Pin function with parentheses determined by MODE pin
resistor strapping. Unlike other I/O pins, input FS3 has an internal
pull-down resistor.
W230-03
I
2
C is a trademark of Phillips Corporation.
Cypress Semiconductor Corporation
Document #: 38-07357 Rev. *A
鈥?/div>
3901 North First Street
鈥?/div>
San Jose
鈥?/div>
CA 95134 鈥?408-943-2600
Revised December 26, 2002

W230-03相關型號PDF文件下載

掃碼下載APP，
一鍵連接廣大的電子世界。

在線人工客服

買家服務：
賣家服務：
技術客服：

0571-85317607

網(wǎng)站技術支持

13606545031

客服在線時間周一至周五
9:00-17:30

關注官方微信號，
第一時間獲取資訊。

建議反饋

聯(lián)系人：

聯(lián)系方式：

按住滑塊，拖拽到最右邊
>>
感謝您向阿庫提出的寶貴意見，您的參與是維庫提升服務的動力！意見一經(jīng)采納，將有感恩紅包奉上哦！