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VSP1021PFB Datasheet

  • VSP1021PFB

  • 3-V, 10-BIT, 25-MSPS, LOW-POWER AREA CCD ANALOG FRONT END

  • 244.52KB

  • 17頁

  • TI

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VSP1021
3 V, 10 BIT, 25 MSPS, LOW POWER
AREA CCD ANALOG FRONT END
SLES016C鈭?FEBRUARY 2002 鈭?REVISED MARCH 2004
features
D
10-Bit, 25-MSPS, Analog-to-Digital
D
D
D
D
D
D
Converter (ADC)
Single Power Supply Operation, 2.7 V to
3.3 V
Low Power: 95 mW at 2.7 V, Power-Down
Mode: 1 mW
Full-Channel Differential-Nonlinearity Error:
<鹵0.5 LSB Typical
Full-Channel Integral-Nonlinearity Error:
<鹵1.5 LSB Typical
Dual Input Modes: CCD and Video
Programmable-Gain Amplifier (PGA) With
0-dB to 36-dB Gain Range (0.047 dB/Step)
for CCD Mode, 0-dB to 12-dB Gain Range
(0.047 dB/Step) for Video Mode
D
Serial Interface for Register Configuration
D
Programmable Black-Level and Offset
D
D
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D
D
Calibration
Analog Gain Implementation With Specified
No Missing Code, Even At High Gains
Additional Digital-to-Analog Converters
(DACs) for External Analog Setting
Internal Reference Voltages
Programmable Internal-Timing Signal
Delays
48-Terminal TQFP Package
applications
D
Digital Still Camera
D
Digital Camcorder
D
Digital Video Camera
description
The VSP1021 device is a highly-integrated monolithic analog-signal processor/digitizer designed to interface
the area charge-coupled-device (CCD) sensors in digital-camera and camcorder applications. The VSP1021
device performs all the analog processing functions necessary to maximize the dynamic range, corrects various
errors associated with the CCD sensor, and then digitizes the results with an on-chip, high-speed ADC. The key
components of the VSP1021 device include:
D
Input clamp circuitry and a correlated double sampler (CDS)
D
Programmable-gain amplifier (PGA) with 0-dB to 36-dB gain range for CCD mode and 0-dB to 12-dB range
for video mode
D
D
D
D
D
Two internal DACs for automatic or programmable optical-black-level and offset calibration
10-bit, 25-MSPS pipeline ADC for CCD mode and a 28-MSPS ADC for video mode
Parallel data port for easy microprocessor interface and a serial port for configuring internal control registers
Two additional DACs for external system control
Internal reference voltages
The VSP1021 device is designed using advanced CMOS process and operates from a single 3-V power supply
with a normal power consumption of just 95 mW, and 1 mW in power-down mode.
High throughput rate, single 3-V operation, very-low-power consumption, and fully-integrated analog-
processing circuitry make the VSP1021 device an ideal CCD and video-signal-processing solution for electronic
video-camcorder applications.
This device is available in a 48-terminal TQFP package and is specified over an operating temperature range
of 鈥?0擄C to 75擄C.
AVAILABLE OPTIONS
TA
鈭?0擄C to 75擄C
PACKAGE TQFP (PFB)
VSP1021PFB
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2004, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

VSP1021PFB 產(chǎn)品屬性

  • 250

  • 集成電路 (IC)

  • 數(shù)據(jù)采集 - 模擬前端 (AFE)

  • -

  • 10

  • 1

  • 105mW

  • 2.7 V ~ 3.3 V

  • 2.7 V ~ 3.3 V

  • 48-TQFP

  • 48-TQFP（7x7）

  • 托盤

  • 296-12700

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