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VSC8116QP2 Datasheet

  • VSC8116QP2

  • ATM/SONET/SDH 622/155Mb/s Transceiver Mux/Demux with Integra...

  • 361.08KB

  • 20頁(yè)

  • VITESSE

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VITESSE
SEMICONDUCTOR CORPORATION
Data Sheet
VSC8116
Features
鈥?Operates at Either STS-3/STM-1 (155.52 Mb/s) or
STS-12/STM-4 (622.08 Mb/s) Data Rates
鈥?Compatible with Industry ATM UNI Devices
鈥?On Chip Clock Generation of the 155.52 Mhz
or 622.08 Mhz High Speed Clock
鈥?Dual 8 Bit Parallel TTL Interface
鈥?SONET/SDH Frame Detection and Recovery
ATM/SONET/SDH 622/155Mb/s Transceiver
Mux/Demux with Integrated Clock Generation
鈥?Loss of Signal (LOS) Control
鈥?Provides Equipment, Facilities and Split Loop-
back Modes as well as Loop Timing Mode
鈥?Meets Bellcore, ITU and ANSI Specifications for
Jitter Performance
鈥?Single 3.3V Supply Voltage
鈥?Low Power - 1.2 Watts Maximum
鈥?64 PQFP Package
General Description
The VSC8116 is an ATM/SONET/SDH compatible transceiver integrating an on-chip clock multiplication
unit (PLL) for the high speed clock and 8 bit serial-to-parallel and parallel-to-serial data conversion. The high
speed clock generated by the on-chip PLL is selectable for 155.52 or 622.08 MHz operation. The demultiplexer
contains SONET/SDH frame detection and recovery. In addition, the device provides both facility and equip-
ment loopback modes and loop timing modes. The part is packaged in a 64 PQFP with an integrated heat
spreader for optimum thermal performance and reduced cost. The VSC8116 provides an integrated solution for
ATM physical layers and SONET/SDH systems applications.
VSC8116 Block Diagram
EQULOOP
LOSTTL
RXDATAIN+/-
LOS
D Q
0
1
RXCLKIN+/-
0
1
0
1
Divide-by-8
RXLSCKOUT
FRAMER
OOF
FP
8
1:8
DEMUX
D Q
RXOUT[7:0]
1
TXDATAOUT+/-
Q D
0
1
0
FACLOOP
Divide-by-8
TXLSCKOUT
8:1
MUX
Q D
8
TXIN[7:0]
1
0
LOOPTIM0
CMU
REFCLK
G52220-0, Rev 4.1
1/8/00
漏
VITESSE
SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 鈥?805/388-3700 鈥?FAX: 805/987-5896
Page 1

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